UPD70F3737GF-GAS-AX Renesas Electronics America, UPD70F3737GF-GAS-AX Datasheet - Page 845
UPD70F3737GF-GAS-AX
Manufacturer Part Number
UPD70F3737GF-GAS-AX
Description
MCU 32BIT V850ES/JX3-L 100-LQFP
Manufacturer
Renesas Electronics America
Series
V850ES/Jx3-Lr
Datasheet
1.UPD70F3737GF-GAS-AX.pdf
(1071 pages)
Specifications of UPD70F3737GF-GAS-AX
Core Processor
RISC
Core Size
32-Bit
Speed
20MHz
Connectivity
CSI, EBI/EMI, I²C, UART/USART
Peripherals
DMA, LVD, PWM, WDT
Number Of I /o
84
Program Memory Size
128KB (128K x 8)
Program Memory Type
FLASH
Ram Size
8K x 8
Voltage - Supply (vcc/vdd)
2.2 V ~ 3.6 V
Data Converters
A/D 12x10b; D/A 2x8b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
*
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Available stocks
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Part Number
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Quantity
Price
Company:
Part Number:
UPD70F3737GF-GAS-AX
Manufacturer:
Renesas Electronics America
Quantity:
10 000
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Item
LVI
Main clock oscillator
Subclock oscillator
Internal oscillator
PLL
CPU
DMA
Interrupt controller
Timer P (TMP0 to TMP5)
Timer Q (TMQ0)
Timer M (TMM0)
Watch timer(/RTC)
Watchdog timer 2
Serial interface
A/D converter
D/A converter
Real-time output function (RTO)
Key interrupt function (KR)
CRC operation circuit
External bus interface
Port function
CPU register set
Internal RAM
Notes1.
2.
3.
4.
5.
If the STOP mode is set while the A/D converter is operating, the A/D converter is automatically stopped
and starts operating again after the STOP mode is released. However, in that case, the first A/D
conversion result after the STOP mode is released is invalid. The A/D conversion result before the STOP
mode is set is also invalid.
Even if the STOP mode is set while the A/D converter is operating, the power consumption is reduced
equivalently to when the A/D converter is stopped before the STOP mode is set.
If the STOP mode is set while the D/A converter is operating, the D/A converter is automatically stopped
and the pin status becomes high impedance. After the STOP mode is released, D/A conversion resumes,
the setting time elapses, and the status returns to the output level before the STOP mode was set.
Even if the STOP mode is set while the D/A converter is operating, the power consumption is reduced
equivalently to when the D/A converter is stopped before the STOP mode is set.
μ
PD70F3792, 70F3793 only
Setting of STOP Mode
Note1
CSIB0 to CSIB4
I
UARTA0 to UARTA5
UARTC0
2
C00 to I
2
Note1
C02
Table 23-8. Operating Status in STOP Mode
Operable
Stops oscillation
Oscillation enabled
Stops operation
Stops operation
Stops operation
Stops operation (but standby mode release is possible)
Stops operation
Stops operation
Operable when f
count clock
Stops operation
Operable when f
count clock
Operable when the SCKBn input clock is selected as the count clock (n = 0 to 4)
Stops operation
Stops operation (but UARTA0 is operable when the ASCKA0 input clock is selected)
Stops operation
Stops operation (conversion result undefined)
Stops operation
Stops operation (output held)
Operable
Stops operation
See 2.2 Pin States.
Retains status before STOP mode was set
Retains status before STOP mode was set
CHAPTER 23 STANDBY FUNCTION
User’s Manual U18953EJ5V0UD
When Subclock Is Not Used
Notes 4, 5
R
R
/8 is selected as the
/8 is selected as the
−
(high impedance is output)
Operating Status
Oscillates
Operable when f
the count clock
Operable when f
count clock
Operable when f
the count clock
Notes 2, 3
When Subclock Is Used
R
XT
R
/8 or f
/8 or f
is selected as the
XT
XT
is selected as
is selected as
843
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