UPD70F3737GF-GAS-AX Renesas Electronics America, UPD70F3737GF-GAS-AX Datasheet - Page 801
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UPD70F3737GF-GAS-AX
Manufacturer Part Number
UPD70F3737GF-GAS-AX
Description
MCU 32BIT V850ES/JX3-L 100-LQFP
Manufacturer
Renesas Electronics America
Series
V850ES/Jx3-Lr
Datasheet
1.UPD70F3737GF-GAS-AX.pdf
(1071 pages)
Specifications of UPD70F3737GF-GAS-AX
Core Processor
RISC
Core Size
32-Bit
Speed
20MHz
Connectivity
CSI, EBI/EMI, I²C, UART/USART
Peripherals
DMA, LVD, PWM, WDT
Number Of I /o
84
Program Memory Size
128KB (128K x 8)
Program Memory Type
FLASH
Ram Size
8K x 8
Voltage - Supply (vcc/vdd)
2.2 V ~ 3.6 V
Data Converters
A/D 12x10b; D/A 2x8b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
*
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Available stocks
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Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
UPD70F3737GF-GAS-AX
Manufacturer:
Renesas Electronics America
Quantity:
10 000
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21.3.4 Interrupt control register (xxICn)
for each maskable interrupt request.
An xxICn register is assigned to each interrupt request signal (maskable interrupt) and sets the control conditions
This register can be read or written in 8-bit or 1-bit units.
Reset sets this register to 47H.
Cautions 1. To mask interrupts, set up the IMR register or use a bit manipulation instruction. The priority
The addresses and bits of the interrupt control registers are as follows.
Note The flag xxlFn is reset automatically by the hardware if an interrupt request signal is acknowledged.
Remark
2. Disable interrupts (DI) before reading the xxICn.xxIFn bit. If the xxIFn bit is read while
xx: Identification name of each peripheral unit (see Table 21-3 Interrupt Control Registers (xxICn))
n: Peripheral unit number (see Table 21-3 Interrupt Control Registers (xxICn)).
xxICn
After reset:
levels must be specified at a time when no interrupt will occur.
interrupts are enabled (EI), the correct value may not be read if acknowledging an interrupt
and reading the bit conflict.
CHAPTER 21 INTERRUPT SERVICING/EXCEPTION PROCESSING FUNCTION
xxPRn2
xxMKn
xxIFn
xxIFn
47H
<7>
0
1
0
1
0
0
0
0
1
1
1
1
Interrupt request not issued
Interrupt request issued
Interrupt servicing enabled
Interrupt servicing disabled (pending)
xxPRn1
R/W
xxMKn
<6>
0
0
1
1
0
0
1
1
Address:
xxPRn0
User’s Manual U18953EJ5V0UD
0
0
1
0
1
0
1
0
1
FFFFF110H to FFFFF17CH
Specifies level 0 (highest).
Specifies level 1.
Specifies level 2.
Specifies level 3.
Specifies level 4.
Specifies level 5.
Specifies level 6.
Specifies level 7 (lowest).
Interrupt request flag
0
Interrupt mask flag
Interrupt priority specification bit
0
xxPRn2
Note
xxPRn1
xxPRn0
799
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