AT91SAM9261SB-CU-999 Atmel, AT91SAM9261SB-CU-999 Datasheet - Page 39
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AT91SAM9261SB-CU-999
Manufacturer Part Number
AT91SAM9261SB-CU-999
Description
IC MCU ARM9 ULTRA LP 217LFBGA
Manufacturer
Atmel
Series
AT91SAMr
Datasheet
1.AT91SAM9261SB-CU-999.pdf
(709 pages)
Specifications of AT91SAM9261SB-CU-999
Core Processor
ARM9
Core Size
16/32-Bit
Speed
190MHz
Connectivity
EBI/EMI, I²C, MMC, SPI, SSC, UART/USART, USB
Peripherals
DMA, LCD, POR, PWM, WDT
Number Of I /o
96
Program Memory Size
32KB (32K x 8)
Program Memory Type
ROM
Ram Size
48K x 8
Voltage - Supply (vcc/vdd)
1.08 V ~ 1.32 V
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
217-LFBGA
Processor Series
AT91SAMx
Core
ARM926EJ-S
Data Bus Width
32 bit
Data Ram Size
16 KB
Interface Type
2-Wire, I2S, SPI, USB
Maximum Clock Frequency
190 MHz
Number Of Programmable I/os
96
Number Of Timers
4
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
3rd Party Development Tools
JTRACE-ARM-2M, MDK-ARM, RL-ARM, ULINK2
Development Tools By Supplier
AT91SAM-ICE, AT91-ISP, AT91SAM9261-EK
Minimum Operating Temperature
- 40 C
For Use With
AT91SAM9261-EK - KIT EVAL FOR AT91SAM926EJ-SAT91SAM-ICE - EMULATOR FOR AT91 ARM7/ARM9
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Data Converters
-
Lead Free Status / Rohs Status
Details
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
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- Download datasheet (10Mb)
11.2.6
11.2.7
6242E–ATARM–11-Sep09
ARM9EJ-S Operating Modes
ARM9EJ-S Registers
Minimum interrupt latency is maintained across both ARM state and Java state. Since byte
codes execution can be restarted, an interrupt automatically triggers the core to switch from
Java state to ARM state for the execution of the interrupt handler. This means that no special
provision has to be made for handling interrupts while executing byte codes, whether in hard-
ware or in software.
In all states, there are seven operation modes:
Mode changes may be made under software control, or may be brought about by external inter-
rupts or exception processing. Most application programs execute in User Mode. The non-user
modes, known as privileged modes, are entered in order to service interrupts or exceptions or to
access protected resources.
The ARM9EJ-S core has a total of 37 registers.
Table 11-1
Table 11-1.
System Mode
• User mode is the usual ARM program execution state. It is used for executing most
• Fast Interrupt (FIQ) mode is used for handling fast interrupts. It is suitable for high-speed data
• Interrupt (IRQ) mode is used for general-purpose interrupt handling
• Supervisor mode is a protected mode for the operating system
• Abort mode is entered after a data or instruction prefetch abort
• System mode is a privileged user mode for the operating system
• Undefined mode is entered when an undefined instruction exception occurs
• 31 general-purpose 32-bit registers
• 6 32-bit status registers
application programs
transfer or channel process
User and
R10
R0
R1
R2
R3
R4
R5
R6
R7
R8
R9
shows all the registers in all modes.
ARM9TDMI
Supervisor
Mode
R10
R0
R1
R2
R3
R4
R5
R6
R7
R8
R9
™
Modes and Registers Layout
Abort Mode
R10
R0
R1
R2
R3
R4
R5
R6
R7
R8
R9
Undefined
Mode
R10
R0
R1
R2
R3
R4
R5
R6
R7
R8
R9
AT91SAM9261S
Interrupt
Mode
R10
R0
R1
R2
R3
R4
R5
R6
R7
R8
R9
Interrupt
R10_FIQ
R8_FIQ
R9_FIQ
Mode
Fast
R0
R1
R2
R3
R4
R5
R6
R7
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