ADUC7032BSTZ-8V-RL Analog Devices Inc, ADUC7032BSTZ-8V-RL Datasheet - Page 122
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ADUC7032BSTZ-8V-RL
Manufacturer Part Number
ADUC7032BSTZ-8V-RL
Description
IC BATTERY SENSOR PREC 48-LQFP
Manufacturer
Analog Devices Inc
Series
MicroConverter® ADuC7xxxr
Datasheet
1.ADUC7032BSTZ-8V-RL.pdf
(128 pages)
Specifications of ADUC7032BSTZ-8V-RL
Core Processor
ARM7
Core Size
16/32-Bit
Speed
20.48MHz
Connectivity
LIN, SPI, UART/USART
Peripherals
POR, PSM, Temp Sensor, WDT
Number Of I /o
9
Program Memory Size
96KB (96K x 8)
Program Memory Type
FLASH
Ram Size
6K x 8
Voltage - Supply (vcc/vdd)
3.5 V ~ 18 V
Data Converters
A/D 2x16b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 105°C
Package / Case
48-LQFP
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Other names
ADUC7032BSTZ-8V-RLCT
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
ADUC7032BSTZ-8V-RL
Manufacturer:
Analog Devices Inc
Quantity:
10 000
Preliminary Technical Data
Example LIN Hardware Synchronization Routine
Consider the following C-Source Code LIN Initialization Routine.
void LIN_INIT(void )
{
Using this configuration, LHSVAL1 begins to count on the first
falling edge received on the LIN bus. If LHSVAL1 exceeds the
value written to LHSVAL1, in this case 0x3f, a Break Compare
interrupt is generated.
ON the next falling edge, LHSVAL0 begins counting. LHSVAL0
monitors the number of falling edges and compares this to the
value written to LHSCON1, in this example the number of
edges to monitor is the sixth falling edge of the LIN frame, or
the fifth falling edge of the SYNC byte. Once this number of
GP2CON = 0x110000; // Enable LHS on GPIO Pins
LHSCON0 = 0x1; // Reset LHS Interface
while((LHSSTA & 0x20) == 0 )
{
}
LHSCON1 = 0x062; // Sets Stop Edge as the fifth falling edge
LHSCON0 = 0x0114; // Gates UART RX Line, ensure no interference
LHSVAL1 = 0x03F; // Set number of 131kHz periods to generate a Break Interrupt
do{
}
while(HVstatus & 0x1); // Wait until command is finished
HVstatus = HVCON;
while((GP2DAT & 0x10 ) == 0 )
{}
LHSCON0 = 0x4;
IRQEN = 0x800;
char HVstatus;
do{
}
while (!(HVstatus & 0x4)); // transmit command is correct
// Wait until the LHS Hardware is reset
// and the start edge as the first falling
// edge in the sync byte
// from the LIN into the UART.
// Selects the stop condition as a falling edge
// Enables Generation of an interrupt on the
// stop condition.
// Enables the interface
// 0x3F / 131kHz ~ 480us which is just over 9.5 TBits. }
HVDAT = 0x02; // Enable Normal LIN TX mode
HVCON = 0x08; // Write to Config0
// Wait until LIN Bus returns High
// Enable LHS to detect Break Condition Ungate RX Line
// Disable all interrupts except Break Compare Interrupt
// Enable UART Interrupt
// The UART is now configured and ready to be used for LIN
Rev. PrD | Page 122 of 128
falling edges is received, a STOP condition interrupt is
generated. It is at this point that the UART is configured to
received the Protected Identifier.
The UART must not be ungated, via LHSCON0[8], before the
LIN bus returns high. If this occurs, UART communication
errors may occur. Example code to ensure this is shown below:
This process is shown in detail in Figure 44.
ADuC7032