ADUC7032BSTZ-8V-RL Analog Devices Inc, ADUC7032BSTZ-8V-RL Datasheet - Page 58
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ADUC7032BSTZ-8V-RL
Manufacturer Part Number
ADUC7032BSTZ-8V-RL
Description
IC BATTERY SENSOR PREC 48-LQFP
Manufacturer
Analog Devices Inc
Series
MicroConverter® ADuC7xxxr
Datasheet
1.ADUC7032BSTZ-8V-RL.pdf
(128 pages)
Specifications of ADUC7032BSTZ-8V-RL
Core Processor
ARM7
Core Size
16/32-Bit
Speed
20.48MHz
Connectivity
LIN, SPI, UART/USART
Peripherals
POR, PSM, Temp Sensor, WDT
Number Of I /o
9
Program Memory Size
96KB (96K x 8)
Program Memory Type
FLASH
Ram Size
6K x 8
Voltage - Supply (vcc/vdd)
3.5 V ~ 18 V
Data Converters
A/D 2x16b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 105°C
Package / Case
48-LQFP
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Other names
ADUC7032BSTZ-8V-RLCT
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
ADUC7032BSTZ-8V-RL
Manufacturer:
Analog Devices Inc
Quantity:
10 000
Preliminary Technical Data
Current Channel ADC Data Register :
Name :
Address :
Default Value :
Access :
Function :
conversion result from the I-ADC. The ADC will not update
this MMR if the ADC0 Conversion Result READY bit
(ADCSTA[0]) is set. A read of this MMR by the MCU clears all
asserted READY flags (ADCSTA[2:0]).
Voltage Channel Data Register:
Name :
Address :
Default Value :
Access :
Function :
conversion result from the V-ADC. The ADC will not update
this MMR if the Voltage Conversion Result READY bit
(ADCSTA[1]) is set. If I-ADC is not active, a read of this MMR
by the MCU clears all asserted READY flags (ADCSTA[2:1]).
Temperature Channel ADC Data Register :
Name :
Address :
Default Value :
Access :
Function :
conversion result from the T-ADC. The ADC will not update
this MMR if the Temperature Conversion Result READY bit
(ADCSTA[2]) is set.
ADC FIFO Register :
Name :
Address :
Default Value :
Access :
Function :
value of I-ADC and V-ADC conversion result held in the FIFO
location currently pointed to by the FIFO read pointer. The low
16 bits [15-0] of this 32-bit word are the I-ADC result and the
high 16-bits [31-16] are the V-ADC result. The FIFO function
is enabled via the ADCCFG[1] bit and 3 flags available in the
ADCSTA register allow user code monitor and read the FIFO
contents.
ADC0DAT
0xFFFF0520
0x0000
Read Only
This ADC Data MMR holds the 16-bit
ADC1DAT
0xFFFF0524
0x0000
Read Only
This ADC Data MMR holds the 16-bit
ADC2DAT
0xFFFF0528
0x0000
Read Only
This ADC Data MMR holds the 16-bit
ADCFIFO
0xFFFF052C
0x0000
Read Only
This 32-bit, read-only register returns the
Rev. PrD | Page 58 of 128
Current Channel ADC Offset Calibration Register :
Name :
Address :
Default Value :
Access :
Function :
calibration coefficient for the I-ADC. The register is configured
at power-on with a factory default value. However, this register
will be automatically overwritten if an offset calibration of the
I-ADC is initiated by the user via bits in the ADCMDE MMR.
User code can only write to this calibration register if the ADC
is in idle mode. An ADC must be enabled and in idle mode
before written to any Offset or Gain Register. A delay of 23us
should be included before ADCMDE is modified.
Voltage Channel Offset Calibration Register :
Name :
Address :
Default Value :
Access :
Function :
calibration coefficient for the voltage channel. The register is
configured at power-on with a factory default value. However,
this register will be automatically overwritten if an offset
calibration of the voltage channel is initiated by the user via bits
in the ADCMDE MMR. User code can only write to this
calibration register if the ADC is in idle mode. An ADC must
be enabled and in idle mode before written to any Offset or
Gain Register. A delay of 23us should be included before
ADCMDE is modified.
Temperature Channel Offset Calibration Register:
Name :
Address :
Default Value :
Access :
Function :
calibration coefficient for the temperature channel. The register
is configured at power-on with a factory default value.
However, this register will be automatically overwritten if an
offset calibration of the temperature channel is initiated by the
user via bits in the ADCMDE MMR. User code can only write
to this calibration register if the ADC is in idle mode. An ADC
must be enabled and in idle mode before written to any Offset
or Gain Register. A delay of 23us should be included before
ADCMDE is modified.
ADC0OF
0xFFFF0530
Part Specific, factory programmed
Read/Write
This ADC Offset MMR holds a 16-bit offset
ADC1OF
0xFFFF0534
Part Specific, factory programmed
Read/Write
This Offset MMR holds a 16-bit offset
ADC2OF
0xFFFF0538
Part Specific, factory programmed
Read/Write
This ADC Offset MMR holds a 16-bit offset
ADuC7032