ADUC7032BSTZ-8V-RL Analog Devices Inc, ADUC7032BSTZ-8V-RL Datasheet - Page 5
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ADUC7032BSTZ-8V-RL
Manufacturer Part Number
ADUC7032BSTZ-8V-RL
Description
IC BATTERY SENSOR PREC 48-LQFP
Manufacturer
Analog Devices Inc
Series
MicroConverter® ADuC7xxxr
Datasheet
1.ADUC7032BSTZ-8V-RL.pdf
(128 pages)
Specifications of ADUC7032BSTZ-8V-RL
Core Processor
ARM7
Core Size
16/32-Bit
Speed
20.48MHz
Connectivity
LIN, SPI, UART/USART
Peripherals
POR, PSM, Temp Sensor, WDT
Number Of I /o
9
Program Memory Size
96KB (96K x 8)
Program Memory Type
FLASH
Ram Size
6K x 8
Voltage - Supply (vcc/vdd)
3.5 V ~ 18 V
Data Converters
A/D 2x16b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 105°C
Package / Case
48-LQFP
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Other names
ADUC7032BSTZ-8V-RLCT
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
ADUC7032BSTZ-8V-RL
Manufacturer:
Analog Devices Inc
Quantity:
10 000
Preliminary Technical Data
ADUC7032 DATASHEET TABLES
Table 1 : ADUC7032—SPECIFICATIONS
Table 2 : SPI Master Mode Timing (PHASE Mode = 1)
Table 3 : SPI Master Mode Timing (PHASE Mode = 0)
Table 4 : SPI Slave Mode Timing (PHASE Mode = 1)
Table 5 : SPI Slave Mode Timing (PHASE Mode = 0)
Table 6. Absolute Maximum Ratings (T
Table 7: Pin Function Descriptions
Table 8: SYSMAP0 MMR Bit Designations
Table 9 : Device RESET Implications
Table 10: RSTSTA/RSTCLR MMR Bit Designations
Table 11: Command Codes in FEE0CON and FEE1CON
Table 12: FEE0STA and FEE1STA MMR bit designations
Table 13: FEE0MOD and FEE1MOD MMR bit designations 34
Table 14: FEE0HID and FEE0PRO MMR bit designations
Table 15: FEE1HID and FEE1PRO MMR bit designations
Table 16: Typical execution cycles in ARM/Thumb mode
Table 17 : Complete MMR List
Table 18 : GND_SW Configuration
Table 19 : Current Channel ADC, Normal Power Mode, Typical
Table 20 : Voltage Channel ADC, Typical Output RMS Noise
Table 21 : Temperature Channel ADC, Typical Output RMS
Table 22 : ADCSTA MMR Bit Designations
Table 23 : ADCMDE MMR Bit Designations
Table 24 : ADC0CON MMR Bit Designations
Table 25 : ADC1CON MMR Bit Designations
Table 26 : ADC2CON MMR Bit Designations
Table 27 : ADCFLT MMR Bit Designations
Table 28 : ADC Conversion Rates and Settling Times
unless otherwise noted)
Output RMS Noise (µV)
(referred to ADC Voltage attenuator Input)(µV)
Noise (µV)
A
= -40°C to 105°C
Rev. PrD | Page 5 of 128
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30
32
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37
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47
48
48
48
49
51
52
53
54
55
56
8
Table 29 : Allowable Combinations of SF and AF
Table 30: ADCCFG MMR Bit Designations
Table 31 : Allowable Combinations of SF and AF
Table 32 : Common ADCFLT Configurations
Table 33: Current ADC Diagnostics
Table 34: Temperature ADC Diagnostics
Table 35 : PLLSTA MMR Bit Description
Table 36: PLLCON MMR Bit description
Table 37 : POWCON MMR bit designations
Table 38 : OSC0TRM MMR Bit Definition
Table 39: OSC0CON MMR Bit Definition
Table 40 : OSC0STA MMR Bit Definition
Table 41 : IRQ/FIQ MMRs bit description
Table 42 : SWICFG MMR Bit Descriptions
Table 43 : Timer Event Capture
Table 44 : T0CON MMR Bit Descriptions
Table 45 : T1CON MMR Bit Descriptions
Table 46 : T2CON MMR Bit Descriptions
Table 47 : T3CON MMR Bit Definition
Table 48 : External GPIO Pin to Internal Port Signal
Table 49 : GP0CON MMR Bit Designations
Table 50 : GP1CON MMR Bit Designations
Table 51 : GP2CON MMR Bit Designations
Table 52 : GP0DAT MMR Bit Descriptions
Table 53 : GP1DAT MMR Bit Descriptions
Table 54 :GP2DAT MMR Bit Descriptions
Table 55 : GP0SET MMR Bit Descriptions
Table 56 : GP1SET MMR Bit Descriptions
Table 57 : GP2SET MMR Bit Descriptions
Table 58 : GP0CLR MMR Bit Descriptions
Assignments
ADuC7032
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57
61
63
66
66
69
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71
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75
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