HD6417032F20 Renesas Electronics America, HD6417032F20 Datasheet - Page 30

IC SUPERH MPU ROMLESS 112QFP

HD6417032F20

Manufacturer Part Number
HD6417032F20
Description
IC SUPERH MPU ROMLESS 112QFP
Manufacturer
Renesas Electronics America
Series
SuperH® SH7030r
Datasheet

Specifications of HD6417032F20

Core Processor
SH-1
Core Size
32-Bit
Speed
20MHz
Connectivity
EBI/EMI, SCI
Peripherals
DMA, POR, PWM, WDT
Number Of I /o
32
Program Memory Type
ROMless
Ram Size
4K x 8
Voltage - Supply (vcc/vdd)
4.5 V ~ 5.5 V
Data Converters
A/D 8x10b
Oscillator Type
Internal
Operating Temperature
-20°C ~ 75°C
Package / Case
112-QFP
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Eeprom Size
-
Program Memory Size
-

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Section 1 Overview
Table 1.1
Feature
CPU
Operating modes
Rev. 7.00 Jan 31, 2006 page 2 of 658
REJ09B0272-0700
Features of the SH7032 and SH7034 Microcomputers
Description
Original Renesas architecture
32-bit internal data paths
General-register machine:
Sixteen 32-bit general registers
Three 32-bit control registers
Four 32-bit system registers
RISC-type instruction set:
Instruction length: 16-bit fixed length for improved code efficiency
Load-store architecture (basic arithmetic and logic operations are
Delayed unconditional branch instructions reduce pipeline disruption
Instruction set optimized for C language
Instruction execution time: one instruction/cycle (50 ns/instruction at 20-
MHz operation)
Address space: 4 Gbytes available in the architecture
On-chip multiplier: multiplication operations (16 bits
executed in 1–3 cycles, and multiplication/accumulation operations (16
bits
Five-stage pipeline
Operating modes:
On-chip ROMless mode
On-chip ROM mode (SH7034 only)
Processing states:
Power-on reset state
Manual reset state
Exception handling state
Program execution state
Power-down state
Bus-released state
Power-down states:
Sleep mode
Software standby mode
executed between registers)
16 bits + 42 bits
42 bits) executed in 2–3 cycles
16 bits
32 bits)

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