HD6417032F20 Renesas Electronics America, HD6417032F20 Datasheet - Page 395

IC SUPERH MPU ROMLESS 112QFP

HD6417032F20

Manufacturer Part Number
HD6417032F20
Description
IC SUPERH MPU ROMLESS 112QFP
Manufacturer
Renesas Electronics America
Series
SuperH® SH7030r
Datasheet

Specifications of HD6417032F20

Core Processor
SH-1
Core Size
32-Bit
Speed
20MHz
Connectivity
EBI/EMI, SCI
Peripherals
DMA, POR, PWM, WDT
Number Of I /o
32
Program Memory Type
ROMless
Ram Size
4K x 8
Voltage - Supply (vcc/vdd)
4.5 V ~ 5.5 V
Data Converters
A/D 8x10b
Oscillator Type
Internal
Operating Temperature
-20°C ~ 75°C
Package / Case
112-QFP
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Eeprom Size
-
Program Memory Size
-

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Bit 1—Multiprocessor Bit (MPB): MPB stores the value of the multiprocessor bit in receive data
when a multiprocessor format is selected for receiving in asynchronous mode. The MPB is a read-
only bit and cannot be written.
Bit 1: MPB
0
1
Bit 0—Multiprocessor Bit Transfer (MPBT): MPBT stores the value of the multiprocessor bit
added to transmit data when a multiprocessor format is selected for transmitting in asynchronous
mode. The MPBT setting is ignored in synchronous mode, when a multiprocessor format is not
selected, or when the SCI is not transmitting.
Bit 0: MPBT
0
1
13.2.8
The bit rate register (BRR) is an eight-bit register that, together with the baud rate generator clock
source selected by the CKS1 and CKS0 bits in the serial mode register (SMR), determines the
serial transmit/receive bit rate.
The CPU can always read and write to BRR. BRR is initialized to H'FF by a reset and in standby
mode. SCI0 and SCI1 have independent baud rate generator control, so different values can be set
in the two channels.
Table 13.3 shows examples of BRR settings in asynchronous mode; table 13.4 shows examples of
BBR settings in synchronous mode.
Bit
Initial value
Read/Write
Bit Rate Register (BRR)
Description
Multiprocessor bit value in receive data is 0
If RE is cleared to 0 when a multiprocessor format is selected, MPB retains its
previous value.
Multiprocessor bit value in receive data is 1
Description
Multiprocessor bit value in transmit data is 0
Multiprocessor bit value in transmit data is 1
R/W
7
1
R/W
6
1
R/W
5
1
Section 13 Serial Communication Interface (SCI)
R/W
4
1
Rev. 7.00 Jan 31, 2006 page 367 of 658
R/W
3
1
R/W
2
1
REJ09B0272-0700
R/W
1
1
(Initial value)
(Initial value)
R/W
0
1

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