M37542F8FP Renesas Electronics America, M37542F8FP Datasheet - Page 21

• Manufacturer Part Number: M37542F8FP
• Description: IC 740 MCU FLASH 32K 36SSOP
• Manufacturer: Renesas Electronics America
• Series: 740/38000r

Specifications of M37542F8FP

• Core Processor: 740
• Core Size: 8-Bit
• Speed: 8MHz
• Connectivity: SIO, UART/USART
• Peripherals: POR, WDT
• Number Of I /o: 29
• Program Memory Size: 32KB (32K x 8)
• Program Memory Type: FLASH
• Ram Size: 1K x 8
• Voltage - Supply (vcc/vdd): 2.2 V ~ 5.5 V
• Data Converters: A/D 8x10b
• Oscillator Type: Internal
• Operating Temperature: -20°C ~ 85°C
• Package / Case: 36-SSOP
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• Eeprom Size: -

7542 Group
I/O Ports
[Direction registers] PiD
The I/O ports have direction registers which determine the input/
output direction of each pin. Each bit in a direction register corre-
sponds to one pin, and each pin can be set to be input or output.
When “1” is set to the bit corresponding to a pin, this pin becomes
an output port. When “0” is set to the bit, the pin becomes an in-
put port.
When data is read from a pin set to output, not the value of the pin
itself but the value of port latch is read. Pins set to input are float-
ing, and permit reading pin values.
If a pin set to input is written to, only the port latch is written to and
the pin remains floating.
Note: P2
[Port P0P3 drive capacity control register] DCCR
By setting the Port P0P3 drive capacity control register (address
0015
the port P0 and port P3 can be selected.
[Pull-up control register] PULL
By setting the pull-up control register (address 0016
and P3 can exert pull-up control by program. However, pins set to
output are disconnected from this control and cannot exert pull-up
control.
[Port P1P3 control register] P1P3C
By setting the port P1P3 control register (address 0017
CMOS input level or a TTL input level can be selected for ports
P1
Rev.3.03
REJ03B0006-0303
0
, P1
16
and PWQN0036KA-A package.
Accordingly, the following settings are required;
• Select P3
• Set direction registers of ports P2
• Set direction registers of ports P3
), the drive capacity of the N-channel output transistor for
2
6
, P1
/AN
6
3
, P2
, P3
Jul 11, 2008
3
7
6
/AN
for the INT
, and P3
7
, P3
5
7
and P3
by program.
1
function.
Page 19 of 117
6
do not exist for the 32-pin version
6
5
and P2
and P3
7
6
to output.
to output.
16
), ports P0
16
), a
Fig. 17 Structure of port P0P3 drive capacity control register
Fig. 18 Structure of pull-up control register
Fig. 19 Structure of port P1P3 control register
N o t e : N u m b e r o f L E D d r i v e p o r t ( d r i v e c a p a c i t y i s H I G H ) i s 8 - p o r t .
N o t e : P i n s s e t t o o u t p u t p o r t s a r e d i s c o n n e c t e d f r o m p u l l - u p c o n t r o l .
b 7
Note: Keep setting the P3
b 7
b7
to “0” (initial value) for 32-pin version and 36PJW-A package.
6
/INT
b 0
1
b 0
input level selection bit
b0
P o r t P 0 P 3 d r i v e c a p a c i t y c o n t r o l r e g i s t e r
( D C C R : a d d r e s s 0 0 1 5
Pull-up control register
(PULL: address 0016
0 : L o w
1 : H i g h
P o r t P 0
P o r t s P 0
P o r t s P 0
P o r t P 3
P o r t s P 3
P o r t P 3
P o r t s P 3
P o r t s P 3
P 0
P 0
P 0
P 3
P 3
P 3
P 3
P 3
Port P1P3 control register
(P1P3C: address 0017
P3
P3
P1
0
1
3
0
1
3
4
6
Not used
, P 0
–P 0
, P 3
, P 3
, P 3
p u l l - u p c o n t r o l b i t
p u l l - u p c o n t r o l b i t
p u l l - u p c o n t r o l b i t
7
0 : CMOS level
1 : TTL level
6
0 : CMOS level
1 : TTL level
0
0 : CMOS level
1 : TTL level
/INT
/INT
,P1
0
0
3
1
3
1,
4
6
2
7
2
5
7
d r i v e c a p a c i t y b i t
d r i v e c a p a c i t y b i t
d r i v e c a p a c i t y b i t
, P 0
–P 0
, P 3
, P 3
p u l l - u p c o n t r o l b i t
p u l l - u p c o n t r o l b i t
p u l l - u p c o n t r o l b i t
p u l l - u p c o n t r o l b i t
2
p u l l - u p c o n t r o l b i t
P 3
0
1
,P1
input level selection bit
input level selection bit
2
2
7
5
7
3
d r i v e c a p a c i t y b i t
d r i v e c a p a c i t y b i t
d r i v e c a p a c i t y b i t
d r i v e c a p a c i t y b i t
d r i v e c a p a c i t y b i t
input level selection bit
1 6
16
, i n i t i a l v a l u e : 0 0
, initial value: 00
16
, initial value: 00
0 : P u l l - u p O f f
1 : P u l l - u p O n
1 6
16
)
)
16
)