M37542F8FP Renesas Electronics America, M37542F8FP Datasheet - Page 32

IC 740 MCU FLASH 32K 36SSOP

M37542F8FP

Manufacturer Part Number
M37542F8FP
Description
IC 740 MCU FLASH 32K 36SSOP
Manufacturer
Renesas Electronics America
Series
740/38000r
Datasheet

Specifications of M37542F8FP

Core Processor
740
Core Size
8-Bit
Speed
8MHz
Connectivity
SIO, UART/USART
Peripherals
POR, WDT
Number Of I /o
29
Program Memory Size
32KB (32K x 8)
Program Memory Type
FLASH
Ram Size
1K x 8
Voltage - Supply (vcc/vdd)
2.2 V ~ 5.5 V
Data Converters
A/D 8x10b
Oscillator Type
Internal
Operating Temperature
-20°C ~ 85°C
Package / Case
36-SSOP
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Eeprom Size
-

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7542 Group
Key Input Interrupt (Key-On Wake-Up)
A key-on wake-up interrupt request is generated by applying “L”
level to any pin of port P0 that has been set to input mode.
In other words, it is generated when the AND of input level goes
from “1” to “0”. An example of using a key input interrupt is shown
in Figure 28, where an interrupt request is generated by pressing
one of the keys provided as an active-low key matrix which uses
ports P0
Fig. 28 Connection example when using key input interrupt and port P0 block diagram
Rev.3.03
REJ03B0006-0303
0
to P0
Jul 11, 2008
3
as input ports.
P0
P0
P0
P0
P0
P0
P0
P0
7
6
5
4
3
2
1
0
output
output
output
output
input
input
input
input
Port PXx
“L” level output
Page 30 of 117
Port P0
selection bit
Port P0
selection bit
Port P0
selection bit
*
*
*
*
*
*
*
*
0
6
4
PULL register
bit 3 = “0”
PULL register
bit 3 = “0”
PULL register
bit 3 = “0”
PULL register
bit 3 = “0”
PULL register
bit 2 = “1”
PULL register
bit 2 = “1”
PULL register
bit 1 = “1”
PULL register
bit 0 = “1”
key-on wakeup
key-on wakeup
key-on wakeup
**
**
**
**
**
**
**
**
Port P0
latch
Port P0
latch
Port P0
latch
Port P0
latch
Port P0
latch
Port P0
latch
Port P0
latch
Port P0
latch
7
6
5
4
3
2
1
0
Port P0
Direction register = “1”
Port P0
Direction register = “1”
Port P0
Direction register = “1”
Port P0
Direction register = “1”
Port P0
Direction register = “0”
Port P0
Direction register = “0”
Port P0
Direction register = “0”
Port P0
Direction register = “0”
7
6
5
4
3
2
1
0
Falling edge
detection
Falling edge
detection
Falling edge
detection
Falling edge
detection
Falling edge
detection
Falling edge
detection
Falling edge
detection
Falling edge
detection
** CMOS output buffer
* P-channel transistor for pull-up
Key input interrupt request
Port P0
Input read circuit

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