MC68HC11E0CFNE3 Freescale Semiconductor, MC68HC11E0CFNE3 Datasheet - Page 40

IC MCU 8BIT 3MHZ 52-PLCC

MC68HC11E0CFNE3

Manufacturer Part Number
MC68HC11E0CFNE3
Description
IC MCU 8BIT 3MHZ 52-PLCC
Manufacturer
Freescale Semiconductor
Series
HC11r
Datasheets

Specifications of MC68HC11E0CFNE3

Core Processor
HC11
Core Size
8-Bit
Speed
3MHz
Connectivity
SCI, SPI
Peripherals
POR, WDT
Number Of I /o
38
Program Memory Type
ROMless
Ram Size
512 x 8
Voltage - Supply (vcc/vdd)
4.5 V ~ 5.5 V
Data Converters
A/D 8x8b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
52-PLCC
Controller Family/series
68HC11
No. Of I/o's
38
Ram Memory Size
512Byte
Cpu Speed
3MHz
No. Of Timers
1
Embedded Interface Type
SCI, SPI
Digital Ic Case Style
LCC
Rohs Compliant
Yes
Processor Series
HC11E
Core
HC11
Data Bus Width
8 bit
Data Ram Size
512 B
Interface Type
SCI, SPI
Maximum Clock Frequency
3 MHz
Number Of Programmable I/os
38
Number Of Timers
8
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
Minimum Operating Temperature
- 40 C
On-chip Adc
8 bit, 8 Channel
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Program Memory Size
-
Lead Free Status / Rohs Status
 Details

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4.2.1 Priority and Mode Select Register
4-6
In the second method, the MODB/V
backup or from a second power supply, as shown in Figure 4-3. Using the MODB/
V
amount of external circuitry is operating from V
contents, reset must be held low whenever V
to SECTION 5 RESETS AND INTERRUPTS.
The four operating modes are selected with the logic states of the mode A (MODA)
and mode B (MODB) pins during reset. The MODA and MODB logic levels determine
the logic state of the special mode (SMOD) and mode A (MDA) control bits in the
HPRIO register.
After reset is released, the mode select pins no longer influence the MCU operating
mode. For single-chip mode, the MODA pin is connected to a logic zero. For expanded
mode, MODA is normally connected to V
MODA pin also functions as the load instruction register (LIR) pin when the MCU is not
in reset. The open drain active low LIR output pin drives low during the first E cycle of
each instruction. The MODB pin also functions as standby power input, V
maintains RAM contents in the absence of V
about hardware mode selection.
STBY
MODB
1
1
0
0
pin may require external hardware, but can be justified when a significant
4.8 V
NiCd
Figure 4-3 RAM Standby MODB/V
Inputs
V
DD
+
Table 4-2 Hardware Mode Select Summary
Freescale Semiconductor, Inc.
OPERATING MODES AND ON-CHIP MEMORY
MODA
V
V
For More Information On This Product,
DD
BATT
0
1
0
1
MAX
690
V
OUT
Go to: www.freescale.com
Expanded Multiplexed
Special Bootstrap
4.7k
STBY
Special Test
Single-Chip
Mode
DD
pin can supply RAM power from a battery
DD
through a pull-up resistor of 4.7 k
TO MODB/V
OF M68HC11
DD
DD
is below normal operating level. Refer
. Refer to Table 4-2 for information
STBY
. If V
RBOOT
STBY
STBY
Connections
0
0
1
0
is used to maintain RAM
Latched at Reset
SMOD
MODB/VSTBY CONN
0
0
1
1
TECHNICAL DATA
MDA
0
1
0
1
STBY,
which
The

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