SAK-TC1775-L40E BA Infineon Technologies, SAK-TC1775-L40E BA Datasheet - Page 4

• Manufacturer Part Number: SAK-TC1775-L40E BA
• Description: IC MCU 32BIT 40MHZ BGA-329
• Manufacturer: Infineon Technologies
• Series: TC17xxr

Specifications of SAK-TC1775-L40E BA

• Core Processor: TriCore
• Core Size: 32-Bit
• Speed: 40MHz
• Connectivity: CAN, EBI/EMI, SDLM, SSC, UART/USART
• Peripherals: POR, WDT
• Number Of I /o: 176
• Program Memory Size: 8KB (8K x 8)
• Program Memory Type: ROM
• Ram Size: 73K x 8
• Voltage - Supply (vcc/vdd): 2.3 V ~ 2.75 V
• Data Converters: A/D 32x12b
• Oscillator Type: External
• Operating Temperature: -40°C ~ 125°C
• Package / Case: 329-BGA
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• Eeprom Size: -
• Other names: SAKTC1775L40EBA; SP000012965

TC1775 Data Sheet
Preliminary
Revision History:
Previous Versions:
Page
Changes from V1.1, 2001-08 to V1.2, 2002-05
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36
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59
60
66
68, 69,
71
73
73
76
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81
82,
84, 87, 89,
92, 94,
95
several
Changes from V1.0, 2001-08 to V1.1, 2001-08
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83
70
95
Subjects (major changes since last revision)
Status of data sheet changed from “Advance Information” into “Preliminary”
ADC features: example of 10-bit ADC conversion time added
Note below
Column “Jitter” in
Parameters” on Page 82
Note on bottom extended “… specified by the crystal suppliers:”
Section “Package Parameters” added
Definition and values for pull-up/pull-down currents changed
Curves for pull-up/pull-down characteristics added
Formulas for conversion time
added
Definition of
Note
I
t
Figure 29
Figure 30
PLL specification and parameters completed
Several AC timing parameter values added or corrected:
t
Definition of
Formal changes
Reference for
t
t
note
t
RFAnom
21
50
31
61
DD
,
and
and
and
t
max corrected;
25
1)
1)
,
added
for
t
t
t
t
(typ.) added
51
32
62
45
,
corrected
corrected
I
changed into TBD; note changed into “Will be guaranteed …”
(Data setup/hold to CLKIN
changed into TBD; note changed into “Will be guaranteed …”
OZ
t
Figure 16
I
46
t
2002-05
V1.1, 2001-08; V1.0, 2001-08;
61
AOV
t
,
added
31
t
and
47
and
Table 8
and
,
I
t
t
DD
55
62
t
k
,
added
32
A
active for
changed
t
61
improved
to
removed; the jitter is now defined in
,
and
t
Page 90
62
t
C
Figure
corrected;
V
DDSB
added
31; 2
added; note for
in burst mode timing) changed;
f
nd
ANA
footnote for
min./max. specification
I
ID
t
10
Table 8
and
,
t
11
“PLL
,
I
SL
t
V1.2
15
added
added
,
t
20
,