FDZ3N513ZT Fairchild Semiconductor, FDZ3N513ZT Datasheet - Page 2

• Manufacturer Part Number: FDZ3N513ZT
• Description: MOSFET N-CH 30V WLCSP 2X2
• Manufacturer: Fairchild Semiconductor

Specifications of FDZ3N513ZT

• Fet Type: MOSFET N-Channel, Schottky, Metal Oxide
• Fet Feature: Logic Level Gate
• Rds On (max) @ Id, Vgs: 462 mOhm @ 300mA, 4.5V
• Drain To Source Voltage (vdss): 30V
• Current - Continuous Drain (id) @ 25° C: 1.1A
• Vgs(th) (max) @ Id: 1.5V @ 250µA
• Gate Charge (qg) @ Vgs: 1nC @ 4.5V
• Input Capacitance (ciss) @ Vds: 85pF @ 15V
• Power - Max: 1W
• Mounting Type: Surface Mount
• Package / Case: *
• Configuration: Dual
• Transistor Polarity: N-Channel
• Resistance Drain-source Rds (on): 462 mOhms
• Forward Transconductance Gfs (max / Min): 0.5 S
• Drain-source Breakdown Voltage: 30 V
• Gate-source Breakdown Voltage: 5.5 V
• Continuous Drain Current: 1.1 A
• Power Dissipation: 1 W
• Maximum Operating Temperature: + 125 C
• Mounting Style: SMD/SMT
• Gate Charge Qg: 1 nC
• Minimum Operating Temperature: - 55 C
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Other names: FDZ3N513ZTTR

©2010 Fairchild Semiconductor Corporation
FDZ3N513ZT Rev. C
Electrical Characteristics
Off Characteristics
On Characteristics
Dynamic Characteristics
Switching Characteristics
Drain-Source Diode Characteristics
Schottky Diode Characteristics
Notes:
1. R
2. Pulse Test: Pulse Width < 300μs, Duty cycle < 2.0%.
3. The diode connected between the gate and source serves only as protection ESD. No gate overvoltage rating is implied.
BV
ΔBV
I
I
V
r
g
C
C
C
R
t
t
t
t
Q
Q
Q
V
t
Q
I
V
DSS
GSS
ΔV
d(on)
r
d(off)
f
rr
R
DS(on)
FS
user's board design.
GS(th)
SD
F
ΔT
ΔT
iss
oss
rss
g
g
gs
gd
rr
Symbol
θJA
DSS
GS(th)
DSS
J
J
is determined with the device mounted on a 1 in
Drain to Source Breakdown Voltage
Breakdown Voltage Temperature
Coefficient
Zero Gate Voltage Drain Current
Gate to Source Leakage Current
Gate to Source Threshold Voltage
Gate to Source Threshold Voltage
Temperature Coefficient
Drain to Source On Resistance
Forward Transconductance
Input Capacitance
Output Capacitance
Reverse Transfer Capacitance
Gate Resistance
Turn-On Delay Time
Rise Time
Turn-Off Delay Time
Fall Time
Total Gate Charge (V
Gate to Source Gate Charge
Gate to Drain “Miller” Charge
Source to Drain Diode Forward Voltage
Reverse Recovery Time
Reverse Recovery Charge
Reverse Leakage
Forward Voltage
Parameter
GS
a. 100 °C/W when mounted on
= 4.5 V)
a 1 in
T
2
J
oz. copper pad on a 1.5 x 1.5 in. board of FR-4 material. R
= 25 °C unless otherwise noted
2
pad of 2 oz copper.
I
I
V
V
V
I
V
V
V
V
f = 1 MHz
V
V
V
I
V
I
V
I
D
D
D
D
F
F
DS
GS
GS
GS
GS
DS
DS
DD
GS
DD
GS
R
= 250 μA, V
= 250 μA, referenced to 25 °C
= 250 μA, referenced to 25 °C
= 0.3 A
= 0.3 A, di/dt = 100 A/μs
= 300 mA
= 20 V
= 24 V, V
= +5 V/-0.3 V, V
= V
= 4.5 V, I
= 3.2 V, I
= 5 V, I
= 15 V, V
= 15 V, I
= 5 V, R
= 15 V
= 0 V, I
DS
2
Test Conditions
, I
D
S
D
D
GEN
D
D
= 0.3 A
= 0.3 A
GS
GS
GS
= 250 μA
= 0.3 A
= 0.3 A
= 0.3 A
T
T
T
T
= 0 V
= 0 V,
= 0 V
= 6 Ω
J
J
J
J
= 25 °C
= 85 °C
= 25 °C
= 85 °C
DS
= 0 V
(Note 2)
θJC
is guaranteed by design while R
b. 260 °C/W when mounted on a
Min
0.5
30
minimum pad of 2 oz copper.
0.75
0.72
0.74
300
-1.6
384
410
2.0
3.1
1.9
9.6
2.7
1.0
0.1
0.3
6.0
Typ
0.7
0.5
45
45
10
16
15
47
θJA
Max
462
520
1.2
1.2
is determined by the
±10
1.5
85
85
25
10
10
20
10
29
10
30
www.fairchildsemi.com
1
mV/°C
mV/°C
Units
mΩ
pF
pF
pF
nC
nC
nC
nC
ns
μA
μA
μA
μA
ns
ns
ns
ns
Ω
V
V
V
V
S