AK5701VNP AKM Semiconductor Inc, AK5701VNP Datasheet - Page 21

• Manufacturer Part Number: AK5701VNP
• Description: IC ADC AUDIO STER 16BIT 24QFN
• Manufacturer: AKM Semiconductor Inc
• Type: ADCr

Specifications of AK5701VNP

• Resolution (bits): 16 b
• Sampling Rate (per Second): 7.35k ~ 48k
• Data Interface: I²S, Serial
• Voltage Supply Source: Analog and Digital
• Voltage - Supply: 3V
• Operating Temperature: -30°C ~ 85°C
• Mounting Type: Surface Mount
• Package / Case: 24-WFQFN Exposed Pad
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Other names: 974-1039-2; AK5701VNP

■
There are the following five clock modes to interface with external devices
Mode
PLL Master Mode
PLL Slave Mode 1
(PLL Reference Clock: MCKI pin)
PLL Slave Mode 2
(PLL Reference Clock: EXLRCK or EXBCLK pin)
EXT Slave Mode
EXT Master Mode
Note 25. If M/S bit = “1”, PMPLL bit = “0” and MCKO bit = “1” during the setting of PLL Master Mode, the invalid
Note 26. In case of EXT Master Mode, the register should be set as
Mode
PLL Master Mode
PLL Slave Mode
(PLL Reference Clock: MCKI pin)
PLL Slave Mode
(PLL Reference Clock: EXLRCK
EXT Slave Mode
EXT Master Mode
Note 27. LRCK becomes 2fs at PLL Master Mode & DSP Mode 1.
■
The M/S bit selects either master or slave mode. M/S bit = “1” selects master mode and “0” selects slave mode. When the
AK5701 is power-down mode (PDN pin = “L”) and exits reset state, the AK5701 is slave mode. After exiting reset state,
the AK5701 goes to master mode by changing M/S bit = “1”.
MS0404-E-02
or EXBCLK pin)
System Clock
Master Mode/Slave Mode
clocks are output from the MCKO pin when MCKO bit is “1”.
(Note
(Note
M/S bit
0
1
25)
26)
Table 3. Select Master/Salve Mode
Table 1. Clock Mode Setting (x: Don’t care)
Master Mode
Slave Mode
Table 2. Clock pins state in Clock Mode
MCKO bit
Mode
OPERATION OVERVIEW
0
1
0
1
0
0
0
Selected by
Selected by
PMPLL bit
MCKO pin
- 21 -
PS1-0 bits
PS1-0 bits
L
L
L
L
L
1
1
1
0
0
EXBCLK, EXLRCK
BCLK, LRCK
Figure
Used pins
PLL3-0 bits
PLL3-0 bits
Selected by
Selected by
Selected by
Selected by
FS1-0 bits
FS1-0 bits
MCKI pin
49.
M/S bit
(Table 1
GND
1
0
0
0
0
and
EXBCLK pin
BCKO1-0 bits)
EXBCLK pin
EXBCLK pin
EXBCLK pin
BCKO1-0 bits)
PLL3-0 bits)
Table
(Selected by
PLL3-0 bits
See
See
See
(Selected by
(Selected by
BCLK pin,
BCLK pin
BCLK pin
(≥ 32fs)
(≥ 32fs)
(default)
Table 4
Table 4
Table 4
x
x
2)
EXLRCK pin
(1fs)
EXLRCK pin
EXLRCK pin
EXLRCK pin
LRCK pin,
Figure 19
Figure 20
Figure 21
Figure 22
Figure 23
LRCK pin
LRCK pin
Figure
(1fs)
(1fs)
(1fs)
(1fs)
[AK5701]
(Note
2007/08
27)