AK5701VNP AKM Semiconductor Inc, AK5701VNP Datasheet - Page 25

• Manufacturer Part Number: AK5701VNP
• Description: IC ADC AUDIO STER 16BIT 24QFN
• Manufacturer: AKM Semiconductor Inc
• Type: ADCr

Specifications of AK5701VNP

• Resolution (bits): 16 b
• Sampling Rate (per Second): 7.35k ~ 48k
• Data Interface: I²S, Serial
• Voltage Supply Source: Analog and Digital
• Voltage - Supply: 3V
• Operating Temperature: -30°C ~ 85°C
• Mounting Type: Surface Mount
• Package / Case: 24-WFQFN Exposed Pad
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Other names: 974-1039-2; AK5701VNP

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A reference clock of PLL is selected among the input clocks to the MCKI, EXBCLK or EXLRCK pin. The required clock
to the AK5701 is generated by an internal PLL circuit. Input frequency is selected by PLL3-0 bits
a) PLL reference clock: MCKI pin
EXBCLK and EXLRCK inputs should be synchronized with MCKO output. The phase between MCKO and EXLRCK is
not important. The MCKO pin outputs the frequency selected by PS1-0 bits
bit. Sampling frequency can be selected by FS3-0 bits
The external clocks (MCKI, EXBCLK and EXLRCK) should always be present whenever the ADC is in operation
(PMADL bit = “1” or PMADR bit = “1”). If these clocks are not provided, the AK5701 may draw excess current and it is
not possible to operate properly because utilizes dynamic refreshed logic internally. If the external clocks are not present,
the ADC should be in the power-down mode (PMADL=PMADR bits = “0”).
b) PLL reference clock: EXBCLK or EXLRCK pin
Sampling frequency corresponds to 7.35kHz to 48kHz by changing FS3-0 bits (
MS0404-E-02
PLL Slave Mode (PMPLL bit = “1”, M/S bit = “0”)
Figure 21. PLL Slave Mode 2 (PLL Reference Clock: EXLRCK or EXBCLK pin)
Figure 20. PLL Slave Mode 1 (PLL Reference Clock: MCKI pin)
AK5701
AK5701
MCKI
MCKO
EXBCLK
EXLRCK
SDTO
MCKI
EXBCLK
EXLRCK
SDTO
256fs/128fs/64fs/32fs
(Table
≥ 32fs
1fs
32fs, 64fs
- 25 -
11.2896MHz, 12MHz, 12.288MHz, 13MHz
13.5MHz, 19.2MHz, 24MHz, 26MHz, 27MHz
1fs
5).
MCLK
BCLK
LRCK
SDTI
BCLK
LRCK
SDTI
(Table
DSP or μP
DSP or μP
Table
9) and the output is enabled by MCKO
6).
(Table
4).
[AK5701]
2007/08