ATA5771-PXQW Atmel, ATA5771-PXQW Datasheet - Page 77
ATA5771-PXQW
Manufacturer Part Number
ATA5771-PXQW
Description
XMITTR UHF ASK/FSK 868MHZ 24VQFN
Manufacturer
Atmel
Datasheet
1.ATA5773-DK1.pdf
(219 pages)
Specifications of ATA5771-PXQW
Frequency
868MHz ~ 928MHz
Modulation Or Protocol
UHF
Power - Output
8dBm
Voltage - Supply
2 V ~ 4 V
Current - Transmitting
9.8mA
Data Interface
PCB, Surface Mount
Memory Size
4kB Flash, 256B EEPROM, 256B SRAM
Antenna Connector
PCB, Surface Mount
Operating Temperature
-40°C ~ 85°C
Package / Case
24-VQFN Exposed Pad, 24-HVQFN, 24-SQFN, 24-DHVQFN
Processor Series
ATA5x
Core
AVR8
Data Bus Width
8 bit
Program Memory Type
Flash
Program Memory Size
4 KB
Data Ram Size
256 B
Interface Type
SPI, USI
Maximum Clock Frequency
4 MHz
Number Of Programmable I/os
12
Number Of Timers
2
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
Minimum Operating Temperature
- 40 C
On-chip Adc
10 bit, 12 Channel
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Applications
-
Sensitivity
-
Data Rate - Maximum
-
Current - Receiving
-
Lead Free Status / Rohs Status
Details
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4.15.2.1
4.15.2.2
4.15.3
9137E–RKE–12/10
Timer/Counter Clock Sources
Registers
Definitions
The Timer/Counter (TCNT0) and Output Compare Registers (OCR0A and OCR0B) are 8-bit
registers. Interrupt request (abbreviated to Int.Req. in the figure) signals are all visible in the
Timer Interrupt Flag Register (TIFR0). All interrupts are individually masked with the Timer
Interrupt Mask Register (TIMSK0). TIFR0 and TIMSK0 are not shown in the figure.
The Timer/Counter can be clocked internally, via the prescaler, or by an external clock source
on the T0 pin. The Clock Select logic block controls which clock source and edge the
Timer/Counter uses to increment (or decrement) its value. The Timer/Counter is inactive when
no clock source is selected. The output from the Clock Select logic is referred to as the timer
clock (clk
The double buffered Output Compare Registers (OCR0A and OCR0B) is compared with the
Timer/Counter value at all times. The result of the compare can be used by the Waveform
Generator to generate a PWM or variable frequency output on the Output Compare pins
(OC0A and OC0B). See
Compare Match event will also set the Compare Flag (OCF0A or OCF0B) which can be used
to generate an Output Compare interrupt request.
Many register and bit references in this section are written in general form. A lower case “n”
replaces the Timer/Counter number, in this case 0. A lower case “x” replaces the Output Com-
pare Unit, in this case Compare Unit A or Compare Unit B. However, when using the register
or bit defines in a program, the precise form must be used, i.e., TCNT0 for accessing
Timer/Counter0 counter value and so on.
The definitions in
Table 4-30.
The Timer/Counter can be clocked by an internal or an external clock source. The clock
source is selected by the Clock Select logic which is controlled by the Clock Select (CS02:0)
bits located in the Timer/Counter Control Register (TCCR0B). For details on clock sources
and prescaler, see
BOTTOM
MAX
TOP
T0
).
Definitions
The counter reaches the BOTTOM when it becomes 0x00.
The counter reaches its MAXimum when it becomes 0xFF (decimal 255).
The counter reaches the TOP when it becomes equal to the highest value in
the count sequence. The TOP value can be assigned to be the fixed value
0xFF (MAX) or the value stored in the OCR0A Register. The assignment is
dependent on the mode of operation.
Table 4-30
Section 4.17 “Timer/Counter Prescaler” on page
Section 4.15.5 “Output Compare Unit” on page 79
are also used extensively throughout the document.
Atmel ATA5771/73/74
123.
for details. The
77
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