ATMEGA128RFA1-ZU Atmel, ATMEGA128RFA1-ZU Datasheet - Page 378
ATMEGA128RFA1-ZU
Manufacturer Part Number
ATMEGA128RFA1-ZU
Description
IC AVR MCU 2.4GHZ XCEIVER 64QFN
Manufacturer
Atmel
Series
ATMEGAr
Datasheets
1.ATMEGA128-16AU.pdf
(385 pages)
2.ATAVR128RFA1-EK1.pdf
(13 pages)
3.ATAVR128RFA1-EK1.pdf
(555 pages)
4.ATMEGA128RFA1-ZU.pdf
(524 pages)
Specifications of ATMEGA128RFA1-ZU
Frequency
2.4GHz
Data Rate - Maximum
2Mbps
Modulation Or Protocol
802.15.4 Zigbee
Applications
General Purpose
Power - Output
3.5dBm
Sensitivity
-100dBm
Voltage - Supply
1.8 V ~ 3.6 V
Current - Receiving
12.5mA
Current - Transmitting
14.5mA
Data Interface
PCB, Surface Mount
Memory Size
128kB Flash, 4kB EEPROM, 16kB RAM
Antenna Connector
PCB, Surface Mount
Operating Temperature
-40°C ~ 85°C
Package / Case
64-VFQFN, Exposed Pad
Rf Ic Case Style
QFN
No. Of Pins
64
Supply Voltage Range
1.8V To 3.6V
Operating Temperature Range
-40°C To +85°C
Svhc
No SVHC (15-Dec-2010)
Rohs Compliant
Yes
Processor Series
ATMEGA128x
Core
AVR8
Data Bus Width
8 bit
Program Memory Type
Flash
Program Memory Size
128 KB
Data Ram Size
16 KB
Interface Type
JTAG
Maximum Clock Frequency
16 MHz
Number Of Programmable I/os
38
Number Of Timers
6
Operating Supply Voltage
1.8 V to 3.6 V
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
3rd Party Development Tools
EWAVR, EWAVR-BL
Development Tools By Supplier
ATAVR128RFA1-EK1
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Part Number:
ATMEGA128RFA1-ZU
Manufacturer:
ATMEL/爱特梅尔
Quantity:
20 000
Company:
Part Number:
ATMEGA128RFA1-ZUR
Manufacturer:
ON
Quantity:
56 000
- ATMEGA128-16AU PDF datasheet
- ATAVR128RFA1-EK1 PDF datasheet #2
- ATAVR128RFA1-EK1 PDF datasheet #3
- ATMEGA128RFA1-ZU PDF datasheet #4
- Current page: 378 of 385
- Download datasheet (8Mb)
Rev. 2467C-02/02
378
ATmega128
12. Added Calibrated RC Oscillator characterization curves in section
13. Updated
14. Added a note regarding usage of Timer/Counter0 combined with the clock. See
1. Corrected Description of Alternate Functions of Port G
2. Added JTAG Version Numbers for rev. F and rev. G
3
4. Corrected
5. Added some Characterization Data in Section
6. Removed Alternative Algortihm for Leaving JTAG Programming Mode.
7. Added Description on How to Access the Extended Fuse Byte Through JTAG Pro-
teristics” on page
More details regarding use of the TWI Power-down operation and using the TWI as master
with low TWBRR values are added into the data sheet. Added the note at the end of the
Rate Generator Unit” on page
on page
“XTAL Divide Control Register – XDIV” on page
Corrected description of TOSC1 and TOSC2 in
Updated Table 100 on page 256.
Added Some Preliminary Test Limits and Characterization Data
Removed some of the TBD's in the following tables and pages:
Table 19 on page
page
See “Leaving Programming Mode” on page 315.
gramming Mode.
See
317.
“Programming the Fuses” on page 317
320,
204.
“Two-wire Serial Interface”
Table 134 on page
“Ordering Information” on page
50,
333.
Table 20 on page
203. Added the description at the end of
323, and Table 136 on page 328.
section.
54,
“DC Characteristics” on page
and
368.
“Alternate Functions of Port G” on page
“Reading the Fuses and Lock Bits” on page
“Typical Characteristics” on page
36.
“Address Match Unit”
“Typical Charac-
318,
2467V–AVR–02/11
Table 131 on
333..
84.
“Bit
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