SLRC40001T/OFE,112 NXP Semiconductors, SLRC40001T/OFE,112 Datasheet - Page 67

• Manufacturer Part Number: SLRC40001T/OFE,112
• Description: IC I.CODE SLRC400 READER 32-SOIC
• Manufacturer: NXP Semiconductors
• Series: I-Coder

Specifications of SLRC40001T/OFE,112

• Rf Type: Read Only
• Frequency: 13.56MHz
• Features: ISO15693, ISO18000-3
• Package / Case: 32-SOIC (0.300", 7.50mm Width)
• Product: RFID Readers
• Operating Temperature Range: - 25 C to + 85 C
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant, Lead free / RoHS Compliant
• Other names: 568-1124-5; 935269551112; SLRC400; SLRC41TOFED

Philips Semiconductors
I•CODE Reader IC
7
7.1
An 8x64 bit FIFO buffer is implemented in the SL RC400 acting as a parallel-to-parallel converter. It buffers
the input and output data stream between the µ-Processor and the internals of the SL RC400. Thus, it is
possible to handle data streams with lengths of up to 64 bytes without taking timing constraints into account.
7.2
7.2.1
The FIFO-buffer input and output data bus is connected to the FIFOData Register. Writing to this register
stores one byte in the FIFO-buffer and increments the internal FIFO-buffer write-pointer. Reading from this
register shows the FIFO-buffer content stored at the FIFO-buffer read-pointer and increments the FIFO-
buffer read-pointer. The distance between the write- and read-pointer can be obtained by reading the
FIFOLength Register.
When the µ-Processor starts a command, the SL RC400 may, while the command is in progress, access the
FIFO-buffer according to that command. Physically only one FIFO-buffer is implemented, which can be used
in input- and output direction. Therefore the µ-Processor has to take care, not to access the FIFO-buffer in
an unintended way.
The following table gives an overview on FIFO access during command processing:
7.3
Besides writing and reading the FIFO-buffer, the FIFO-buffer pointers may be reset by setting the bit
FlushFIFO. The consequence is, that FIFOLength becomes zero, FIFOOvfl is cleared, the actually stored
bytes are not accessible anymore and the FIFO-buffer can be filled with another 64 bytes again.
Active Command
LoadConfig
Transceive
CalcCRC
Transmit
Receive
WriteE2
ReadE2
FIFO BUFFER
StartUp
Overview
Accessing the FIFO Buffer
Controlling the FIFO-Buffer
Idle
ACCESS RULES
Write to FIFO
µ-Processor is allowed to
-
-
-
Table 7-1: Allowed Access to the FIFO-Buffer
Read from FIFO
-
-
-
-
-
-
67
µ-Processor has to know the actual state of the command
(transmitting or receiving)
The µ-Processor has to prepare the arguments,
then only reading is allowed
Product Specification Rev. 3.1 August 2004
Remark
SL RC400