LP3907QTLX-VXSS/NOPB National Semiconductor, LP3907QTLX-VXSS/NOPB Datasheet - Page 22

IC REG BUCK SYNC-2 LDO-2 25MSMD

LP3907QTLX-VXSS/NOPB

Manufacturer Part Number
LP3907QTLX-VXSS/NOPB
Description
IC REG BUCK SYNC-2 LDO-2 25MSMD
Manufacturer
National Semiconductor
Series
PowerWise®r
Datasheet

Specifications of LP3907QTLX-VXSS/NOPB

Topology
Step-Down (Buck) Synchronous (2), Linear (LDO) (2)
Function
Any Function
Number Of Outputs
4
Frequency - Switching
2.1MHz
Voltage/current - Output 1
1.8V, 1A
Voltage/current - Output 2
3.3V, 600mA
Voltage/current - Output 3
2.8V, 300mA
W/led Driver
No
W/supervisor
No
W/sequencer
Yes
Voltage - Supply
2.8 V ~ 5.5 V
Operating Temperature
-40°C ~ 85°C
Mounting Type
Surface Mount
Package / Case
25-UFBGA
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
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FLEXIBLE POWER SEQUENCING OF MULTIPLE POWER
SUPPLIES
The LP3907 provides several options for power on sequenc-
ing. The two bucks can be individually controlled with ENSW1
and ENSW2. The two LDOs can also be individually con-
trolled with ENLDO1 and ENLDO2.
If the user desires a set power on sequence, he can program
the chip through I
activate the power on sequencing.
POWER UP SEQUENCING USING THE EN_T FUNCTION
EN_T assertion causes the LP3907 to emerge from Standby
mode to Full Operation mode at a preset timing sequence. By
default, the enables for the LDOs and Bucks (ENLDO1, ENL-
DO2, EN_T, ENSW1, ENSW2) are 500K internally pulled
down, which causes the part to stay OFF until enabled. If the
2
C and raise EN_T from LOW to HIGH to
22
user wishes to use the preset timing sequence to power on
the regulators, transition the EN_T pin from Low to High. Oth-
erwise, simply tie the enables of each specific regulator HIGH
to turn on automatically.
EN_T is edge triggered with rising edge signaling the chip to
power on. The EN_T input is deglitched and the default is set
at 1ms. As shown in the next 2 diagrams, a rising EN_T edge
will start a power on sequence, while a falling EN_T edge will
start a shutdown sequence. If EN_T is high, toggling the ex-
ternal enables of the regulators will have no effect on the chip.
The regulators can also be programmed through I
on and off. By default, I
The regulators are on following the pattern below:
Regulators on = (I
EN_T high).
2
C enable) AND (External pin enable OR
30017809
2
C enables for the regulators on ON.
2
C to turn

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