LP3907QTLX-VXSS/NOPB National Semiconductor, LP3907QTLX-VXSS/NOPB Datasheet - Page 8

• Manufacturer Part Number: LP3907QTLX-VXSS/NOPB
• Description: IC REG BUCK SYNC-2 LDO-2 25MSMD
• Manufacturer: National Semiconductor
• Series: PowerWise®r

Specifications of LP3907QTLX-VXSS/NOPB

• Topology: Step-Down (Buck) Synchronous (2), Linear (LDO) (2)
• Function: Any Function
• Number Of Outputs: 4
• Frequency - Switching: 2.1MHz
• Voltage/current - Output 1: 1.8V, 1A
• Voltage/current - Output 2: 3.3V, 600mA
• Voltage/current - Output 3: 2.8V, 300mA
• W/led Driver: No
• W/supervisor: No
• W/sequencer: Yes
• Voltage - Supply: 2.8 V ~ 5.5 V
• Operating Temperature: -40°C ~ 85°C
• Mounting Type: Surface Mount
• Package / Case: 25-UFBGA
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

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LLP Pin
Pin Descriptions
A: Analog Pin
VIN+ is the largest potential voltage on the device.
DAP
No.
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
1
2
3
4
5
6
7
8
9
Power Block Input
VINLDO12
AVDD
VIN1
VIN2
LDO 1
LDO 2
micro SMD
pin no.
B4, B5
C4
C3
C5
D5
D4
D3
D2
D1
C1
C2
E5
E4
E3
E2
E1
B2
B1
A1
A2
B3
A3
A4
A5
D: Digital Pin
VINLDO12
GND_SW1
GND_SW2
VINLDO1
VINLDO2
ENLDO1
ENLDO2
ENSW1
GND_C
ENSW2
GND_L
AVDD
Name
nPOR
LDO1
LDO2
EN_T
VIN1
VIN2
SW1
SW2
SDA
DAP
SCL
FB1
FB2
G: Ground Pin
Enabled
GND
I/O
I/O
O
G
O
G
O
G
G
O
O
≤
≤
I
I
I
I
I
I
I
I
I
I
I
I
I
I
VIN+
VIN+
VIN+
VIN+
PWR: Power Pin
VIN+
VIN+
Power Block Operation
Type
PWR
PWR
PWR
PWR
PWR
PWR
PWR
PWR
PWR
PWR
GND
D
D
G
D
A
G
A
D
G
D
D
G
D
D
Disabled
8
I: Input Pin
VIN+ or 0V
VIN+ or 0V
≤
≤
Analog Power for Internal Functions (VREF, BIAS, I
Enable for preset power on sequence. (See page 20.)
nPOR Power on reset pin for both Buck1 and Buck 2. Open drain
logic output 100K pullup resistor. nPOR is pulled to ground when
the voltages on these supplies are not good. See nPOR section
for more info.
Buck1 NMOS Power Ground
Buck1 switcher output pin
Power in from either DC source or Battery to Buck1
Enable Pin for Buck1 switcher, a logic HIGH enables Buck1
Buck1 input feedback terminal
Non switching core ground pin
Analog Power for Buck converters
Buck2 input feedback terminal
Enable Pin for Buck2 switcher, a logic HIGH enables Buck2
Power in from either DC source or Battery to Buck2
Buck2 switcher output pin
Buck2 NMOS Power ground
I
I
LDO ground
Power in from either DC source or battery to input terminal to
LDO1
LDO1 Output
LDO1 enable pin, a logic HIGH enables the LDO1
LDO2 enable pin, a logic HIGH enables the LDO2
LDO2 Output
Power in from either DC source or battery to input terminal to
LDO2.
Connection isn't necessary for electrical performance, but it is
recommended for better thermal dissipation.
VIN+
VIN+
2
2
C Data (bidirectional)
C Clock
VIN+
VIN+
I/O: Input/Output Pin
Note
Always Powered
Always Powered
If Enabled, Min Vin is 1.74V
If Enabled, Min Vin is 1.74V
Description
O: Output Pin.
2
C, Logic)