DSPIC30F5015-20I/PT Microchip Technology, DSPIC30F5015-20I/PT Datasheet - Page 219

• Manufacturer Part Number: DSPIC30F5015-20I/PT
• Description: Digital Signal Processor
• Manufacturer: Microchip Technology
• Series: dsPIC™ 30Fr

Specifications of DSPIC30F5015-20I/PT

• Core Processor: dsPIC
• Core Size: 16-Bit
• Speed: 20 MIPS
• Connectivity: CAN, I²C, SPI, UART/USART
• Peripherals: Brown-out Detect/Reset, Motor Control PWM, QEI, POR, PWM, WDT
• Number Of I /o: 52
• Program Memory Size: 66KB (22K x 24)
• Program Memory Type: FLASH
• Eeprom Size: 1K x 8
• Ram Size: 2K x 8
• Voltage - Supply (vcc/vdd): 2.5 V ~ 5.5 V
• Data Converters: A/D 16x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 64-TFQFP
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• For Use With: AC30F008 - MODULE SKT FOR DSPIC30F 64TQFP
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant, Lead free / RoHS Compliant
• Other names: DSPIC30F501520IPT

APPENDIX A:
Revision A (July 2005)
Original data sheet for dsPIC30F5015/5016 devices.
Revision B (September 2006)
Revision B of this data sheet reflects these changes:
• Base instruction CP1 removed (see Table 22-2)
• Supported I
• ADC Conversion Clock selection (see
• Revised Electrical Characteristics
Revision C (January 2007)
This revision includes updates to the packaging
diagram.
© 2007 Microchip Technology Inc.
Section 21.0 “10-bit High-Speed Analog-to-
Digital Converter (ADC) Module”)
- Operating current (I
- Idle current (I
- Power-down current (I
- I/O Pin input specifications
- BOR voltage limits
- Watchdog Timer limits
(see Table 24-6)
(see Table 24-7)
(see Table 24-8)
(see Table 24-9)
(see Table 24-11)
(see Table 24-21)
2
C Slave Addresses (see Table 17-1)
IDLE
) specifications
REVISION HISTORY
DD
) specifications
PD
) specifications
Revision D (June 2008)
This revision reflects these updates:
• Changed the location of the input reference in the
• Added FUSE Configuration Register (FICD)
• Added Note 2 in Device Configuration Registers
• Removed erroneous statement regarding
• Electrical Specifications:
• Removed dsPIC30F6010 device reference from
• Removed IC5 and IC6 pin references from the
• Changed Interrupt Vectors 40-43 to Reserved
• Updated PMD2 SFR – bits 15-12 and 7-4 are
• Additional minor corrections throughout the
10-bit High-Speed ADC Functional Block Diagram
(see Figure 21-1)
details (see Section 20.6 “Device Configuration
Registers” and Table 20-8)
table (Table 20-8)
generation of CAN receive errors (see
Section 19.4.5 “Receive Errors”)
- Resolved TBD values for parameters DO10,
- 10-bit High-Speed ADC t
- Parameter OS65 (Internal RC Accuracy) has
- Parameter DC12 (RAM Data Retention
- Parameter D134 (Erase/Write Cycle Time)
- Removed parameters OS62 (Internal FRC
- Parameter OS63 (Internal FRC Accuracy)
- Updated Min and Max values and Conditions
the third paragraph of Section 7.0 “Data
EEPROM Memory”
64-pin TQFP pin diagram (see “Pin Diagram”)
and Figure 1-1
(see Table 5-1)
unimplemented (see Table 20-7)
document
dsPIC30F5015/5016
DO16, DO20, and DO26 (see Table 24-10)
parameter (time to stabilize) has been
updated from 20 µs typical to 20 µs maximum
(see Table 24-41)
been expanded to reflect multiple Min and
Max values for different temperatures (see
Table 24-19)
Voltage) Min and Max values have been
updated (see Table 24-5)
has been updated to include Min and Max
values and the Typ value has been removed
(see Table 24-12)
Jitter) and OS64 (Internal FRC Drift) and
Note 2 from AC Characteristics (see
Table 24-18)
has been expanded to reflect multiple Min
and Max values for different temperatures
(see Table 24-18)
for parameter SY11 and updated Min, Typ,
and Max values and Conditions for parame-
ter SY20 (see Table 24-21)
PDU
timing
DS70149D-page 219