DSPIC30F5015-20I/PT Microchip Technology, DSPIC30F5015-20I/PT Datasheet - Page 221

• Manufacturer Part Number: DSPIC30F5015-20I/PT
• Description: Digital Signal Processor
• Manufacturer: Microchip Technology
• Series: dsPIC™ 30Fr

Specifications of DSPIC30F5015-20I/PT

• Core Processor: dsPIC
• Core Size: 16-Bit
• Speed: 20 MIPS
• Connectivity: CAN, I²C, SPI, UART/USART
• Peripherals: Brown-out Detect/Reset, Motor Control PWM, QEI, POR, PWM, WDT
• Number Of I /o: 52
• Program Memory Size: 66KB (22K x 24)
• Program Memory Type: FLASH
• Eeprom Size: 1K x 8
• Ram Size: 2K x 8
• Voltage - Supply (vcc/vdd): 2.5 V ~ 5.5 V
• Data Converters: A/D 16x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 64-TFQFP
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• For Use With: AC30F008 - MODULE SKT FOR DSPIC30F 64TQFP
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant, Lead free / RoHS Compliant
• Other names: DSPIC30F501520IPT

INDEX
A
A/D
AC
AC Characteristics ........................................................... 184
Address Generator Units ................................................... 37
Alternate Vector Table (AIVT) ............................................ 47
Alternate 16-bit Timer/Counter ........................................... 91
Assembler
Automatic Clock Stretch ................................................... 112
B
Barrel Shifter ...................................................................... 24
Bit-Reversed Addressing ................................................... 40
Block Diagrams
© 2008 Microchip Technology Inc.
Aborting a Conversion ............................................. 154
Acquisition Requirements ........................................ 158
ADCHS .................................................................... 151
ADCON1 .................................................................. 151
ADCON2 .................................................................. 151
ADCON3 .................................................................. 151
ADCSSL ................................................................... 151
ADPCFG .................................................................. 151
Configuring Analog Port Pins ................................... 160
Connection Considerations ...................................... 160
Conversion Operation .............................................. 153
Effects of a Reset ..................................................... 159
Operation During CPU Idle Mode ............................ 159
Operation During CPU Sleep Mode ......................... 159
Output Formats ........................................................ 159
Power-Down Modes ................................................. 159
Programming the Start of Conversion Trigger ......... 154
Register Map ............................................................ 161
Result Buffer ............................................................ 153
Selecting the Conversion Clock ............................... 154
Selecting the Conversion Sequence ........................ 153
Temperature and Voltage Specifications ................. 184
Internal FRC Jitter, Accuracy and Drift .................... 188
Internal LPRC Accuracy ........................................... 188
Load Conditions ....................................................... 184
PLL Jitter .................................................................. 186
MPASM Assembler .................................................. 172
During 10-bit Addressing (STREN = 1) .................... 112
During 7-bit Addressing (STREN = 1) ...................... 112
Receive Mode .......................................................... 112
Transmit Mode ......................................................... 112
Example ..................................................................... 40
Implementation .......................................................... 40
Modifier Values for XBREV Register ......................... 41
Sequence Table (16-Entry) ........................................ 41
CAN Buffers and Protocol Engine ............................ 126
Dedicated Port Structure ............................................ 61
DSP Engine ............................................................... 21
dsPIC30F5015 ........................................................... 10
dsPIC30F5016 ........................................................... 13
External Power-on Reset Circuit .............................. 144
Input Capture Mode ................................................... 81
I
Oscillator System ..................................................... 137
Output Compare Mode .............................................. 85
Programmer’s Model .................................................. 19
PWM Module ............................................................. 96
Quadrature Encoder Interface ................................... 89
Reset System ........................................................... 141
2
C ............................................................................ 110
BOR. See Brown-out Reset.
Brown-out Reset (BOR) ................................................... 135
C
C Compilers
CAN
CAN Module .................................................................... 125
Code Examples
Code Protection ............................................................... 135
Configuring Analog Port Pins ............................................. 62
dsPIC30F5015/5016
Shared Port Structure ................................................ 62
SPI ........................................................................... 106
SPI Master/Slave Connection .................................. 106
UART Receiver ........................................................ 118
UART Transmitter .................................................... 117
10-bit High-Speed A/D Functional ........................... 152
16-bit Timer1 Module (Type A Timer) ........................ 68
16-bit Timer2 (Type B Timer) .................................... 73
16-bit Timer3 (Type C Timer) .................................... 73
16-bit Timer4 (Type B Timer) .................................... 78
16-bit Timer5 (Type C Timer) .................................... 78
32-bit Timer2/3 .......................................................... 72
32-bit Timer4/5 .......................................................... 77
MPLAB C18 ............................................................. 172
MPLAB C30 ............................................................. 172
Baud Rate Setting ................................................... 130
Bit Timing ................................................................. 130
Message Reception ................................................. 128
Message Transmission ............................................ 129
Modes of Operation ................................................. 127
Phase Segments ..................................................... 131
Prescaler Setting ..................................................... 131
Propagation Segment .............................................. 131
Sample Point ........................................................... 131
Synchronization ....................................................... 131
CAN1 Register Map ................................................. 132
Frame Types ........................................................... 125
Overview .................................................................. 125
Data EEPROM Block Erase ...................................... 58
Data EEPROM Block Write ....................................... 60
Data EEPROM Read ................................................. 57
Data EEPROM Word Erase ...................................... 58
Data EEPROM Word Write ....................................... 59
Erasing a Row of Program Memory .......................... 53
Initiating a Programming Sequence .......................... 54
Loading Write Latches ............................................... 54
Acceptance Filter Masks ................................. 128
Acceptance Filters ........................................... 128
Receive Buffers ............................................... 128
Receive Errors ................................................. 128
Receive Interrupts ........................................... 128
Receive Overrun .............................................. 128
Aborting ........................................................... 129
Errors ............................................................... 129
Interrupts ......................................................... 130
Sequence ........................................................ 129
Transmit Buffers .............................................. 129
Transmit Priority .............................................. 129
Disable ............................................................ 127
Error Recognition ............................................. 127
Initialization ...................................................... 127
Listen-Only ...................................................... 127
Loopback ......................................................... 127
Normal ............................................................. 127
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