DSPIC30F5015-20I/PT Microchip Technology, DSPIC30F5015-20I/PT Datasheet - Page 53

• Manufacturer Part Number: DSPIC30F5015-20I/PT
• Description: Digital Signal Processor
• Manufacturer: Microchip Technology
• Series: dsPIC™ 30Fr

Specifications of DSPIC30F5015-20I/PT

• Core Processor: dsPIC
• Core Size: 16-Bit
• Speed: 20 MIPS
• Connectivity: CAN, I²C, SPI, UART/USART
• Peripherals: Brown-out Detect/Reset, Motor Control PWM, QEI, POR, PWM, WDT
• Number Of I /o: 52
• Program Memory Size: 66KB (22K x 24)
• Program Memory Type: FLASH
• Eeprom Size: 1K x 8
• Ram Size: 2K x 8
• Voltage - Supply (vcc/vdd): 2.5 V ~ 5.5 V
• Data Converters: A/D 16x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 64-TFQFP
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• For Use With: AC30F008 - MODULE SKT FOR DSPIC30F 64TQFP
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant, Lead free / RoHS Compliant
• Other names: DSPIC30F501520IPT

6.6
A complete programming sequence is necessary for
programming or erasing the internal Flash in RTSP
mode. A programming operation is nominally 2 msec in
duration and the processor stalls (waits) until the oper-
ation is finished. Setting the WR bit (NVMCON<15>)
starts the operation, and the WR bit is automatically
cleared when the operation is finished.
6.6.1
The user can erase or program one row of program
Flash memory at a time. The general process is:
1.
2.
3.
EXAMPLE 6-1:
© 2008 Microchip Technology Inc.
; Setup NVMCON for erase operation, multi word write
; program memory selected, and writes enabled
; Init pointer to row to be ERASED
Read one row of program Flash (32 instruction
words) and store into data RAM as a data
“image”.
Update the data image with the desired new
data.
Erase program Flash row.
a)
b)
c)
d)
e)
f)
g)
Programming Operations
Set up NVMCON register for multi-word,
program Flash, erase, and set WREN bit.
Write address of row to be erased into
NVMADRU/NVMDR.
Write ‘0x55’ to NVMKEY.
Write ‘0xAA’ to NVMKEY.
Set the WR bit. This will begin erase cycle.
CPU will stall for the duration of the erase
cycle.
The WR bit is cleared when erase cycle
ends.
MOV
MOV
MOV
MOV
MOV
MOV
DISI
MOV
MOV
MOV
MOV
BSET
NOP
NOP
PROGRAMMING ALGORITHM FOR
PROGRAM FLASH
#0x4041,W0
W0
#tblpage(PROG_ADDR),W0
W0
#tbloffset(PROG_ADDR),W0
W0, NVMADR
#5
#0x55,W0
W0
#0xAA,W1
W1
NVMCON,#WR
,
,
,
,
ERASING A ROW OF PROGRAM MEMORY
NVMCON
NVMADRU
NVMKEY
NVMKEY
;
; Init NVMCON SFR
;
; Initialize PM Page Boundary SFR
; Intialize in-page EA[15:0] pointer
; Intialize NVMADR SFR
; Block all interrupts with priority <7
; for next 5 instructions
; Write the 0x55 key
;
; Write the 0xAA key
; Start the erase sequence
; Insert two NOPs after the erase
; command is asserted
4.
5.
6.
6.6.2
Example 6-1 shows a code sequence that can be used
to erase a row (32 instructions) of program memory.
dsPIC30F5015/5016
Write 32 instruction words of data from data
RAM “image” into the program Flash write
latches.
Program 32 instruction words into program
Flash.
a)
b)
c)
d)
e)
f)
Repeat steps 1 through 5 as needed to program
desired amount of program Flash memory.
Set up NVMCON register for multi-word,
program Flash, program, and set WREN
bit.
Write ‘0x55’ to NVMKEY.
Write ‘0xAA’ to NVMKEY.
Set the WR bit. This will begin program
cycle.
CPU will stall for duration of the program
cycle.
The WR bit is cleared by the hardware
when program cycle ends.
ERASING A ROW OF PROGRAM
MEMORY
DS70149D-page 53