DSPIC30F5015-20I/PT Microchip Technology, DSPIC30F5015-20I/PT Datasheet - Page 224

• Manufacturer Part Number: DSPIC30F5015-20I/PT
• Description: Digital Signal Processor
• Manufacturer: Microchip Technology
• Series: dsPIC™ 30Fr

Specifications of DSPIC30F5015-20I/PT

• Core Processor: dsPIC
• Core Size: 16-Bit
• Speed: 20 MIPS
• Connectivity: CAN, I²C, SPI, UART/USART
• Peripherals: Brown-out Detect/Reset, Motor Control PWM, QEI, POR, PWM, WDT
• Number Of I /o: 52
• Program Memory Size: 66KB (22K x 24)
• Program Memory Type: FLASH
• Eeprom Size: 1K x 8
• Ram Size: 2K x 8
• Voltage - Supply (vcc/vdd): 2.5 V ~ 5.5 V
• Data Converters: A/D 16x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 64-TFQFP
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• For Use With: AC30F008 - MODULE SKT FOR DSPIC30F 64TQFP
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant, Lead free / RoHS Compliant
• Other names: DSPIC30F501520IPT

dsPIC30F5015/5016
Q
Quadrature Encoder Interface (QEI) .................................. 89
R
Reader Response ............................................................ 227
Reset ........................................................................ 135, 141
Reset Sequence ................................................................. 45
Resets
Revision History ............................................................... 219
Run-Time Self-Programming (RTSP) ................................ 51
S
Simple Capture Event Mode
Simple Output Compare Match Mode ................................ 86
Simple PWM Mode ............................................................ 86
Software Simulator (MPLAB SIM) .................................... 172
Software Stack Pointer, Frame Pointer .............................. 18
SPI Module ....................................................................... 105
STATUS Register ............................................................... 18
Symbols Used in Opcode Descriptions ............................ 164
DS70149D-page 224
Single-Pulse Operation ............................................ 101
Special Event Trigger ............................................... 103
Time Base .................................................................. 97
Update Lockout ........................................................ 103
Interrupts .................................................................... 92
Logic .......................................................................... 90
Operation During CPU Idle Mode .............................. 91
Operation During CPU Sleep Mode ........................... 91
Register Map .............................................................. 93
Timer Operation During CPU Idle Mode .................... 92
Timer Operation During CPU Sleep Mode ................. 91
Reset Sources ........................................................... 45
BOR, Programmable ................................................ 143
POR ......................................................................... 142
POR with Long Crystal Start-up Time ...................... 143
POR, Operating without FSCM and PWRT ............. 143
Control Registers ....................................................... 52
Operation ................................................................... 52
Capture Buffer Operation ........................................... 82
Capture Prescaler ...................................................... 81
Hall Sensor Mode ...................................................... 82
Timer2 and Timer3 Selection Mode ........................... 82
Input Pin Fault Protection ........................................... 86
Period ......................................................................... 87
CALL Stack Frame ..................................................... 33
Framed SPI Support ................................................ 107
Operating Function Description ............................... 105
Operation During CPU Idle Mode ............................ 107
Operation During CPU Sleep Mode ......................... 107
SDOx Disable .......................................................... 105
Slave Select Synchronization .................................. 107
SPI1 Register Map ................................................... 108
SPI2 Register Map ................................................... 108
Word and Byte Communication ............................... 105
Postscaler ........................................................ 103
Continuous Up/Down Counting Modes .............. 97
Double Update Mode ......................................... 98
Free-Running Mode ........................................... 97
Postscaler .......................................................... 98
Prescaler ............................................................ 98
Single-Shot Mode .............................................. 97
NVMADR ........................................................... 52
NVMADRU ......................................................... 52
NVMCON ........................................................... 52
NVMKEY ............................................................ 52
System Integration ........................................................... 135
T
Timer1 Module ................................................................... 67
Timer2/3 Module ................................................................ 71
Timer4/5 Module ................................................................ 77
Timing Diagrams
Register Map ........................................................... 149
Gate Operation .......................................................... 68
Interrupt ..................................................................... 69
Operation During Sleep Mode ................................... 68
Prescaler ................................................................... 68
Real-Time Clock ........................................................ 69
Register Map ............................................................. 70
16-bit Asynchronous Counter Mode .......................... 67
16-bit Synchronous Counter Mode ............................ 67
16-bit Timer Mode ...................................................... 67
ADC Event Trigger ..................................................... 74
Gate Operation .......................................................... 74
Interrupt ..................................................................... 74
Operation During Sleep Mode ................................... 74
Register Map ............................................................. 75
Timer Prescaler ......................................................... 74
16-bit Mode ................................................................ 71
32-bit Synchronous Counter Mode ............................ 71
32-bit Timer Mode ...................................................... 71
Register Map ............................................................. 79
Band Gap Start-up Time .......................................... 191
Brown-out Reset ...................................................... 182
CAN Bit .................................................................... 130
CAN Module I/O ....................................................... 209
Center-Aligned PWM ................................................. 99
CLKOUT and I/O ..................................................... 189
Dead-Time ............................................................... 101
Edge-Aligned PWM ................................................... 98
External Clock .......................................................... 184
Input Capture (CAPx) .............................................. 195
I
I
I
I
Motor Control PWM Module .................................... 197
Motor Control PWM Module Fault ........................... 197
OC/PWM Module ..................................................... 196
Output Compare (OCx) ............................................ 195
PWM Output .............................................................. 87
QEA/QEB Input Characteristics ............................... 198
QEI Module Index Pulse .......................................... 199
Reset, Watchdog Timer, Oscillator Start-up Timer
SPI Master Mode (CKE = 0) .................................... 200
SPI Master Mode (CKE = 1) .................................... 201
SPI Slave Mode (CKE = 0) ...................................... 202
SPI Slave Mode (CKE = 1) ...................................... 203
Time-out Sequence on Power-up
Time-out Sequence on Power-up
Time-out Sequence on Power-up
TimerQ (QEI Module) External Clock ...................... 194
Timer1, 2, 3, 4, 5 External Clock ............................. 192
10-bit High-Speed A/D Conversion (CHPS = 01,
2
2
2
2
C Bus Data (Master Mode) ................................... 205
C Bus Data (Slave Mode) ..................................... 207
C Bus Start/Stop Bits (Master Mode) .................... 205
C Bus Start/Stop Bits (Slave Mode) ...................... 207
Interrupts ........................................................... 69
Oscillator Operation ........................................... 69
and Power-up Timer ........................................ 190
(MCLR Not Tied to V
(MCLR Not Tied to V
(MCLR Tied to V
SIMSAM = 0, ASAM = 0, SSRC = 000) ........... 212
© 2008 Microchip Technology Inc.
DD
) ........................................ 142
DD
DD
), Case 1 .................... 142
), Case 2 .................... 143