DSPIC30F5015-20I/PT Microchip Technology, DSPIC30F5015-20I/PT Datasheet - Page 25

Digital Signal Processor

DSPIC30F5015-20I/PT

Manufacturer Part Number
DSPIC30F5015-20I/PT
Description
Digital Signal Processor
Manufacturer
Microchip Technology
Series
dsPIC™ 30Fr

Specifications of DSPIC30F5015-20I/PT

Core Processor
dsPIC
Core Size
16-Bit
Speed
20 MIPS
Connectivity
CAN, I²C, SPI, UART/USART
Peripherals
Brown-out Detect/Reset, Motor Control PWM, QEI, POR, PWM, WDT
Number Of I /o
52
Program Memory Size
66KB (22K x 24)
Program Memory Type
FLASH
Eeprom Size
1K x 8
Ram Size
2K x 8
Voltage - Supply (vcc/vdd)
2.5 V ~ 5.5 V
Data Converters
A/D 16x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
64-TFQFP
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
For Use With
AC30F008 - MODULE SKT FOR DSPIC30F 64TQFP
Lead Free Status / RoHS Status
Lead free / RoHS Compliant, Lead free / RoHS Compliant
Other names
DSPIC30F501520IPT

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
DSPIC30F5015-20I/PT
Manufacturer:
Microchip Technology
Quantity:
10 000
3.0
3.1
The program address space is 4M instruction words. It
is addressable by the 23-bit PC, table instruction
Effective Address (EA), or data space EA, when
program space is mapped into data space, as defined
by Table 3-1. Note that the program space address is
incremented by two between successive program
words, in order to provide compatibility with data space
addressing.
User program space access is restricted to the lower
4M instruction word address range (0x000000 to
0x7FFFFE), for all accesses other than TBLRD/TBLWT,
which use TBLPAG<7> to determine user or
configuration space access. In TABLE 3-1: “Program
Space Address Construction”, bit 23 allows access
to the Device ID, the User ID and the Configuration bits.
Otherwise, bit 23 is always clear.
© 2008 Microchip Technology Inc.
Note:
MEMORY ORGANIZATION
Program Address Space
This data sheet summarizes features of
this group of dsPIC30F devices and is not
intended to be a complete reference
source. For more information on the CPU,
peripherals, register descriptions and
general device functionality, refer to the
“dsPIC30F Family Reference Manual”
(DS70046). For more information on the
device instruction set and programming,
refer to the “dsPIC30F/33F Programmer’s
Reference Manual” (DS70157).
FIGURE 3-1:
dsPIC30F5015/5016
Reset - GOTO Instruction
Alternate Vector Table
Reset - Target Address
Interrupt Vector Table
Device Configuration
Program Memory
(22K instructions)
UNITID (32 instr.)
Data EEPROM
DEVID (2)
User Flash
(Read ‘0’s)
Reserved
Registers
Reserved
Reserved
Reserved
(1 Kbyte)
Reserved
PROGRAM SPACE
MEMORY MAP FOR
dsPIC30F5015/5016
DS70149D-page 25
000000
000002
000004
00007E
000080
000084
0000FE
000100
00AFFE
00B000
7FFBFE
7FFC00
7FFFFE
800000
8005BE
8005C0
8005FE
800600
F7FFFE
F80000
F8000E
F80010
FEFFFE
FF0000
FFFFFE
Vector Tables

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