EP9315-IBZ Cirrus Logic Inc, EP9315-IBZ Datasheet - Page 298

• Manufacturer Part Number: EP9315-IBZ
• Description: 32-Bit Microcontroller IC
• Manufacturer: Cirrus Logic Inc
• Series: EP9r

Specifications of EP9315-IBZ

• Controller Family/series: (ARM9)
• Core Size: 32 Bit
• A/d Converter: 12 Bits
• Supply Voltage: 3.3V
• No. Of I/o Pins: 65
• Package / Case: 352-PBGA
• Clock Frequency: 200MHz
• Core Processor: ARM9
• Speed: 200MHz
• Connectivity: EBI/EMI, EIDE, Ethernet, I²C, IrDA, Keypad/Touchscreen, PCMCIA, SPI, UART/USART, USB
• Peripherals: AC'97, DMA, I&sup2:S, LCD, LED, MaverickKey, POR, PWM, WDT
• Number Of I /o: 16
• Program Memory Type: ROMless
• Ram Size: 32K x 8
• Voltage - Supply (vcc/vdd): 1.65 V ~ 3.6 V
• Data Converters: A/D 8x12b
• Oscillator Type: External
• Operating Temperature: -40°C ~ 85°C
• Processor Series: EP93xx
• Core: ARM920T
• Data Bus Width: 32 bit
• 3rd Party Development Tools: MDK-ARM, RL-ARM, ULINK2
• Development Tools By Supplier: EDB9315A-Z
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• For Use With: 598-1144 - KIT DEVELOPMENT EP9315 ARM9
• Eeprom Size: -
• Program Memory Size: -
• Lead Free Status / Rohs Status: Details
• Other names: 598-1263

8
TRANSPATTRN
BLOCKMASK
8-34
Graphics Accelerator
EP93xx User’s Guide
31
15
31
15
Address:
Default:
Mask:
Definition:
Bit Descriptions:
Address:
Default:
Mask:
Definition:
Bit Descriptions:
30
14
30
14
29
13
29
13
28
12
28
12
0x8004_0028 - Read/Write
0x0000_0000
0x00FF_FFFF
Block Function Transparency Pattern Register
RSVD:
PATRN:
0x8004_002C - Read/Write
0x0000_0000
0x00FF_FFFF
Block Mask Register
RSVD:
RSVD
RSVD
27
27
11
11
26
10
26
10
Copyright 2007 Cirrus Logic
25
25
9
9
Reserved - Unknown during read
Transparent Bit Pattern - Read/Write
The value in this field specifies a transparent bit pattern.
Transparent pixel transfers are not written. The
transparent pixel definition is located in the least
significant BPP part of the field for modes less than
24 bpp. Bits 0-23 are used for 24 bpp mode, bits 0-15 are
used for 16 bpp mode, bits 0-7 are used for 8 bpp mode,
and bits 0-3 are used for 4 bpp mode.
Reserved - Unknown during read
24
24
8
8
PATRN
MASK
23
23
7
7
22
22
6
6
21
21
5
5
20
20
4
4
PATRN
MASK
19
19
3
3
18
18
2
2
17
17
1
1
DS785UM1
16
16
0
0