EP9315-IBZ Cirrus Logic Inc, EP9315-IBZ Datasheet - Page 77
EP9315-IBZ
Manufacturer Part Number
EP9315-IBZ
Description
32-Bit Microcontroller IC
Manufacturer
Cirrus Logic Inc
Series
EP9r
Specifications of EP9315-IBZ
Controller Family/series
(ARM9)
Core Size
32 Bit
A/d Converter
12 Bits
Supply Voltage
3.3V
No. Of I/o Pins
65
Package / Case
352-PBGA
Clock Frequency
200MHz
Core Processor
ARM9
Speed
200MHz
Connectivity
EBI/EMI, EIDE, Ethernet, I²C, IrDA, Keypad/Touchscreen, PCMCIA, SPI, UART/USART, USB
Peripherals
AC'97, DMA, I²:S, LCD, LED, MaverickKey, POR, PWM, WDT
Number Of I /o
16
Program Memory Type
ROMless
Ram Size
32K x 8
Voltage - Supply (vcc/vdd)
1.65 V ~ 3.6 V
Data Converters
A/D 8x12b
Oscillator Type
External
Operating Temperature
-40°C ~ 85°C
Processor Series
EP93xx
Core
ARM920T
Data Bus Width
32 bit
3rd Party Development Tools
MDK-ARM, RL-ARM, ULINK2
Development Tools By Supplier
EDB9315A-Z
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
For Use With
598-1144 - KIT DEVELOPMENT EP9315 ARM9
Eeprom Size
-
Program Memory Size
-
Lead Free Status / Rohs Status
Details
Other names
598-1263
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
EP9315-IBZ
Manufacturer:
CIRRUS
Quantity:
13
Company:
Part Number:
EP9315-IBZ
Manufacturer:
CIRRUS
Quantity:
347
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DS785UM1
condition code field of any subsequent ARM instruction to gate the execution of that
instruction based on the result of a Crunch compare operation.
Table 3-3
bits and the NZCV flags. The FCC bits and the NZCV flags provide the same information, but
in different ways and in different places. Their values depend only on the relationship
between the operands, regardless of whether the operands are considered signed integer,
unsigned integer, or floating point. The unordered relationship can only apply to floating point
operands.
The NZCV flags are not computed exactly as with integer comparisons using the ARM CMP
instruction. Hence, when examining the result of Crunch comparisons, the condition codes
field of ARM instructions should be interpreted differently, as shown in
six condition codes should be used whether the comparison operands were signed integers,
unsigned integers, or floating point. No other condition codes are meaningful.
Opcode[31:28] Mnemonic
0000
0001
1010
1011
1100
1101
Condition Code
1110
1111
illustrates the legal relationships and, for each one, the values written to the FCC
Relationship
Table 3-4. ARM ® Condition Codes and Crunch Compare Results
Unordered
A
A
A
Table 3-3. Comparison Relationships and Their Results
=
<
>
B
B
B
EQ
NE
GE
NV
GT
LE
AL
LT
Relationship
Copyright 2007 Cirrus Logic
A
A
A
A
A
A
N/A
N/A
=
≠
≥
<
>
≤
B
B
B
B
B
B
Signed Greater Than or Equal Greater Than or Equal
Signed Less Than or Equal
Always (unconditional)
FCC[1:0]
Signed Greater Than
Signed Less Than
ARM Meaning
00
01
10
11
Not Equal
Never
Equal
Always (unconditional)
MaverickCrunch Co-Processor
Crunch Meaning
Less Than or Equal
Greater Than
NCZV
Less Than
Not Equal
0100
1000
1001
0000
Table
Never
Equal
EP93xx User’s Guide
3-4. The same
3-7
3
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