Core429-DEV-KIT Actel, Core429-DEV-KIT Datasheet - Page 14

• Manufacturer Part Number: Core429-DEV-KIT
• Description: MCU, MPU & DSP Development Tools ARINC 429 Bus Interface
• Manufacturer: Actel

Specifications of Core429-DEV-KIT

• Processor To Be Evaluated: ProASIC Plus
• Interface Type: RS-232

Control Register
Core429 contains a 16-bit control register, which is used to configure the Rx and Tx channels. The control register bits
0 to 15 are loaded from the databus when CTRL_n is low. The control register contents are output on the databus
when RSEL is high and STR_n is low. Each bit of the control register description is explained in
Table 20 •
1 4
Bit
0
1
2
3
4
5
6
7
8
9
10
11
12
13
14
ARINC 429 Bus Interface
Match ARINC bit 10 (receiver 1)
Match ARINC bit 10 (receiver 2)
Match ARINC bit 9 (receiver 1)
Match ARINC bit 9 (receiver 2)
Enable label recognition
Enable label recognition
Enable 32 bit as parity
Transmitter data rate
Receiver 1 data rate
Receiver 2 data rate
Legacy Control Register
Receiver 1 decoder
Receiver 2 decoder
Transmitter parity
Label compare
(Receiver 1)
(Receiver 2)
Function
Self test
Reset
State Type
0
0
0
0
0
1
0
0
0
0
0
0
0
0
0
R/W Data rate: 0 = 100 kbps; 1 = 12.5 kbps. Note: Does not support 50 kbps.
R/W 0 = disable; 1 = enable
R/W 0: Disable label recognition
R/W 0: Disable label recognition
R/W 0 = 32 bit is data; 1 = 32 bit is parity
R/W 0: The transmitter’s digital outputs are internally connected to the receiver
R/W 0: Receiver 1 decoder disabled
R/W If receiver 1 decoder is enabled, the ARINC bit 9 should match this bit.
R/W If receiver 1 decoder is enabled, the ARINC bit 10 should match this bit.
R/W 0: Receiver 2 decoder disabled
R/W If receiver 2 decoder is enabled, the ARINC bit 9 should match this bit.
R/W If receiver 2 decoder is enabled, the ARINC bit 10 should match this bit.
R/W Parity: 0 = odd; 1 = even
R/W Data rate: 0 = 100 kbps; 1 = 12.5 kbps. Note: Does not support 50 kbps.
R/W Data rate: 0 = 100 kbps; 1 = 12.5 kbps. Note: Does not support 50 kbps.
Load 16 labels using pl1_n/pl2_n
Read 16 labels using en1_n/en2_n
1: Enable label recognition
1: Enable label recognition
logic inputs.
1: Normal operation
1: ARINC bits 9 and 10 must match bits 7 and 8 of the control register.
1: ARINC bits 9 and 10 must match bits 10 and 11 of the control register.
v5.0
Description
Table
20.