DSPIC33FJ32GP204-H/ML Microchip Technology, DSPIC33FJ32GP204-H/ML Datasheet - Page 118

• Manufacturer Part Number: DSPIC33FJ32GP204-H/ML
• Description: 16-bit DSC, 44LD,32KB Flash,40 MIPS,nanoWatt 44 QFN 8x8x0.9mm TUBE
• Manufacturer: Microchip Technology
• Series: dsPIC™ 33Fr

Specifications of DSPIC33FJ32GP204-H/ML

• Core Processor: dsPIC
• Core Size: 16-Bit
• Speed: 40 MIPs
• Connectivity: I²C, IrDA, LIN, SPI, UART/USART
• Peripherals: Brown-out Detect/Reset, POR, PWM, WDT
• Number Of I /o: 35
• Program Memory Size: 32KB (32K x 8)
• Program Memory Type: FLASH
• Ram Size: 2K x 8
• Voltage - Supply (vcc/vdd): 3 V ~ 3.6 V
• Data Converters: A/D 13x12b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 140°C
• Package / Case: 44-VQFN Exposed Pad
• Processor Series: dsPIC33F
• Core: dsPIC
• Data Bus Width: 16 bit
• Interface Type: SPI, I2C, UART, JTAG
• Number Of Programmable I/os: 35
• Operating Supply Voltage: 3.3 V
• Maximum Operating Temperature: + 140 C
• Mounting Style: SMD/SMT
• Development Tools By Supplier: MPLAB IDE Software
• Minimum Operating Temperature: - 40 C
• On-chip Adc: 10 bit, 13 Channel
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Lead Free Status / Rohs Status: Details

dsPIC33FJ32GP202/204 and dsPIC33FJ16GP304
10.7
The dsPIC33FJ32GP202/204 and dsPIC33FJ16GP304
devices implement 17 registers for remappable
peripheral configuration:
• Input Remappable Peripheral Registers (9)
• Output Remappable Peripheral Registers (8)
REGISTER 10-1:
DS70290G-page 118
bit 15
bit 7
Legend:
R = Readable bit
-n = Value at POR
bit 15-13
bit 12-8
bit 7-0
Note:
U-0
U-0
—
—
Peripheral Pin Select Registers
Input and Output Register values can only
be changed if OSCCON[IOLOCK] = 0.
See
Lock”
Section 10.6.3.1 “Control Register
Unimplemented: Read as ‘0’
INT1R<4:0>: Assign External Interrupt 1 (INTR1) to the corresponding RPn pin
11111 = Input tied to Vss
11001 = Input tied to RP25
•
•
•
00001 = Input tied to RP1
00000 = Input tied to RP0
Unimplemented: Read as ‘0’
for a specific command sequence.
U-0
U-0
—
—
RPINR0: PERIPHERAL PIN SELECT INPUT REGISTER 0
W = Writable bit
‘1’ = Bit is set
U-0
U-0
—
—
R/W-1
U-0
—
U = Unimplemented bit, read as ‘0’
‘0’ = Bit is cleared
R/W-1
U-0
—
INT1R<4:0>
R/W-1
U-0
—
© 2011 Microchip Technology Inc.
x = Bit is unknown
R/W-1
U-0
—
R/W-1
U-0
—
bit 8
bit 0