DSPIC33FJ32GP204-H/ML Microchip Technology, DSPIC33FJ32GP204-H/ML Datasheet - Page 120
![16-bit DSC, 44LD,32KB Flash,40 MIPS,nanoWatt 44 QFN 8x8x0.9mm TUBE](/photos/16/12/161255/qfn28_sml.jpg)
DSPIC33FJ32GP204-H/ML
Manufacturer Part Number
DSPIC33FJ32GP204-H/ML
Description
16-bit DSC, 44LD,32KB Flash,40 MIPS,nanoWatt 44 QFN 8x8x0.9mm TUBE
Manufacturer
Microchip Technology
Series
dsPIC™ 33Fr
Datasheet
1.DSPIC33FJ16GP304-IPT.pdf
(284 pages)
Specifications of DSPIC33FJ32GP204-H/ML
Core Processor
dsPIC
Core Size
16-Bit
Speed
40 MIPs
Connectivity
I²C, IrDA, LIN, SPI, UART/USART
Peripherals
Brown-out Detect/Reset, POR, PWM, WDT
Number Of I /o
35
Program Memory Size
32KB (32K x 8)
Program Memory Type
FLASH
Ram Size
2K x 8
Voltage - Supply (vcc/vdd)
3 V ~ 3.6 V
Data Converters
A/D 13x12b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 140°C
Package / Case
44-VQFN Exposed Pad
Processor Series
dsPIC33F
Core
dsPIC
Data Bus Width
16 bit
Interface Type
SPI, I2C, UART, JTAG
Number Of Programmable I/os
35
Operating Supply Voltage
3.3 V
Maximum Operating Temperature
+ 140 C
Mounting Style
SMD/SMT
Development Tools By Supplier
MPLAB IDE Software
Minimum Operating Temperature
- 40 C
On-chip Adc
10 bit, 13 Channel
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Lead Free Status / Rohs Status
Details
- Current page: 120 of 284
- Download datasheet (4Mb)
dsPIC33FJ32GP202/204 and dsPIC33FJ16GP304
REGISTER 10-3:
DS70290G-page 120
bit 15
bit 7
Legend:
R = Readable bit
-n = Value at POR
bit 15-13
bit 12-8
bit 7-5
bit 4-0
U-0
U-0
—
—
Unimplemented: Read as ‘0’
T3CKR<4:0>: Assign Timer3 External Clock (T3CK) to the corresponding RPn pin
11111 = Input tied to Vss
11001 = Input tied to RP25
•
•
•
00001 = Input tied to RP1
00000 = Input tied to RP0
Unimplemented: Read as ‘0’
T2CKR<4:0>: Assign Timer2 External Clock (T2CK) to the corresponding RPn pin
11111 = Input tied to Vss
11001 = Input tied to RP25
•
•
•
00001 = Input tied to RP1
00000 = Input tied to RP0
U-0
U-0
—
—
RPINR3: PERIPHERAL PIN SELECT INPUT REGISTER 3
W = Writable bit
‘1’ = Bit is set
U-0
U-0
—
—
R/W-1
R/W-1
U = Unimplemented bit, read as ‘0’
‘0’ = Bit is cleared
R/W-1
R/W-1
T3CKR<4:0>
T2CKR<4:0>
R/W-1
R/W-1
© 2011 Microchip Technology Inc.
x = Bit is unknown
R/W-1
R/W-1
R/W-1
R/W-1
bit 8
bit 0
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