EVAL-ADUC7060QSPZ Analog Devices Inc, EVAL-ADUC7060QSPZ Datasheet - Page 78

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EVAL-ADUC7060QSPZ

Manufacturer Part Number
EVAL-ADUC7060QSPZ
Description
Quick Start Development System
Manufacturer
Analog Devices Inc
Series
QuickStart™ PLUS Kitr
Type
MCU, ARM7r
Datasheet

Specifications of EVAL-ADUC7060QSPZ

Contents
Evaluation Board, Power Supply, Cable, Software, Emulator and Documentation
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
For Use With/related Products
ADuC7060
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Other names
Q5189809
ADuC7060
UART Control Register 1
This 8-bit register controls the operation of the UART in
conjunction with COMCON0.
Name:
Address:
Default value:
Access:
Table 88. COMCON1 MMR Bit Designations
Bit
7:5
4
3:2
1
0
UART Status Register 0
COMSTA0 Register
Name:
Address:
Default value:
Access:
Function:
Name
LOOPBACK
RTS
DTR
COMCON1
0xFFFF0710
0x00
Read and write
COMSTA0
0xFFFF0714
0x60
Read only
This 8-bit read-only register reflects the
current status on the UART.
Description
Reserved bits. Not used.
Loopback. Set by user to enable
loopback mode. In loopback mode,
the transmit pin is forced high.
Reserved bits. Not used.
Request to send.
Set by user to force the RTS output to 0.
Cleared by user to force the RTS
output to 1.
Data terminal ready.
Set by user to force the DTR output to 0.
Cleared by user to force the DTR
output to 1.
Rev. 0 | Page 78 of 100
Table 89. COMSTA0 MMR Bit Designations
Bit
7
6
5
4
3
2
1
0
Name
TEMT
THRE
BI
FE
PE
OE
DR
Reserved.
COMTX and shift register empty status
bit.
COMTX empty status bit.
Break indicator.
Cleared automatically.
Framing error.
Cleared automatically.
Cleared automatically.
Overrun error.
Cleared automatically.
Data ready.
Description
Set automatically if COMTX and the shift
register are empty. This bit indicates that
the data has been transmitted, that is, no
more data is present in the shift register.
Cleared automatically when writing to
COMTX.
Set automatically if COMTX is empty.
COMTX can be written as soon as this bit
is set, the previous data might not have
been transmitted yet and can still be
present in the shift register.
Cleared automatically when writing to
COMTX.
Set when P1.0/IRQ1/SIN/T0 pin is held
low for more than the maximum word
length.
Set when the stop bit is invalid.
Parity error.
Set when a parity error occurs.
Set automatically if data are overwritten
before being read.
Set automatically when COMRX is full.
Cleared by reading COMRX.

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