CS1D-IC102D Omron, CS1D-IC102D Datasheet - Page 144
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CS1D-IC102D
Manufacturer Part Number
CS1D-IC102D
Description
CS1D Dual IO Control Unit
Manufacturer
Omron
Datasheet
1.CS1D-SP002.pdf
(638 pages)
Specifications of CS1D-IC102D
Lead Free Status / Rohs Status
Lead free / RoHS Compliant
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2-13-1 Memory Required for Units and Inner Boards
2-14 I/O Table Settings
I/O Table Settings
Note
Note Refer to the CX-Programmer manual for Units not listed in the table.
used in the CPU Bus Unit Setting Area by all of the CPU Bus Units and the
Inner Board does not exceed this capacity. If the wrong combination of Units
is used, the capacity will be exceeded and either Units will operate from
default settings only or will not operate at all.
The following table shows the number of bytes required in the CPU Bus Unit
Setting Area by each Unit and the Inner Board. Any Unit or Inner Board with a
usage of “0” does not use the CPU Bus Unit Setting Area at all.
1. Units that are allocated no bytes do not use the CPU Bus Unit Setting Area
2. When duplex Ethernet communications are used, twice the listed memory
3. Only for Process-control CPU Units.
4. Only for Single CPU Systems.
The following settings are used in the I/O tables on the CX-Programmer.
CS-series CPU
Bus Units
Inner Boards
Classification
at all.
will be required (i.e., memory will be required for two Units). With Duplex
Controller Link communications (CS1W-CLK12/52-V1), memory is re-
quired only for one Unit even though two Controller Link Units are mount-
ed.
Controller Link Unit
SYSMAC LINK Unit
Serial Communica-
tions Unit
Ethernet Unit
Duplex Ethernet Unit
(See note 2.)
DeviceNet Unit
Loop Control Unit
Loop Control Board
built into Process-con-
trol CPU Unit
(See note 3.)
Loop Control Board
(See note 4.)
Serial Communica-
tions Board
(See note 4.)
Name
CS1W-CLK21/12/52-
V1
CS1W-CLK11
CS1W-SLK21/11
CS1W-SCU21
CS1W-ETN21
CS1W-ETN01
CS1D-ETN21D
CS1W-DRM21-V1
CS1W-LC001
CS1D-LCB05D
CS1W-LCB01/02
CS1W-SCB21-V1/41-
V1
Model number
512
512
0
994
412
384
0
0
0
0
0
required (bytes)
Section 2-14
Memory
109
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