CS1D-IC102D Omron, CS1D-IC102D Datasheet - Page 289

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CS1D-IC102D

Manufacturer Part Number
CS1D-IC102D
Description
CS1D Dual IO Control Unit
Manufacturer
Omron
Datasheet

Specifications of CS1D-IC102D

Lead Free Status / Rohs Status
Lead free / RoHS Compliant
8-2-2
CIO Area
254
I/O Memory Areas
DM Area
EM Area
Timer Completion
Flags
Counter Completion
Flags
Timer PVs
Counter PVs
Task Flag Area
Index Registers (See
note 4.)
Data Registers (See
note 4.)
Area
Overview of the Data Areas
32,768
words
32,768
words
per bank
(0 to C,
13 max.)
4,096
bits
4,096
bits
4,096
words
4,096
words
32 bits
16 regis-
ters
16 regis-
ters
Size
Note
D00000 to
D32767
E0_00000
to
EC_32767
T0000 to
T4095
C0000 to
C4095
T0000 to
T4095
C0000 to
C4095
TK00 to
TK31
IR0 to
IR15
DR0 to
DR15
Range
1. The I/O Area can be expanded to CIO 0000 to CIO 0999 by changing the
2. If the IOM Hold Bit (A50012) is ON, the content of these words will be held
3. Bits in the DM Area and EM Area can be manipulated using TST(350),
4. Index registers and data registers can be used either individually by task
5. Timer PVs can be refreshed indirectly by forced setting/resetting Timer
6. Counter PVs can be refreshed indirectly by forced setting/resetting
The data areas in the I/O Memory Area are described in detail below.
It isn’t necessary to input the “CIO” acronym when specifying an address in
the CIO Area. The CIO Area is generally used for data exchanges such as I/O
refreshing with various Units. Words that aren’t allocated to Units may be
used as work words and work bits in the program only.
first words allocated to Racks.
even if the operating mode is changed.
If the PLC Setup’s “IOM Hold Bit Status at Startup” setting is also set to
protect the IOM Hold Bit, the contents of the I/O Area won’t be cleared
when the PLC’s power supply is cycled OFF and ON again.
TSTN(351), SET, SETB(532), RSTB(533), OUTB(534).
or they can be shared by all the tasks.
Completion Flags.
Counter Completion Flags.
---
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---
---
---
---
---
---
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alloca-
nal I/O
Exter-
tion
No (See
note 3.)
No (See
note 3.)
OK
OK
---
---
OK
OK
No
access
Bit
OK
OK
---
---
OK
OK
---
OK
OK
access
Word
OK
OK
OK
OK
OK
OK
OK
Indirect
address-
ing only
OK
Read
Access
OK
OK
OK
OK
OK
OK
No
Specific
instruc-
tions
only
OK
Write
OK
OK
OK
OK
OK
OK
No
No
No
Change
Device
gram-
ming
from
Pro-
Main-
tained
Main-
tained
Cleared
(See note
2.)
Main-
tained
Cleared
(See note
2.)
Main-
tained
Cleared
Cleared
(See note
2.)
Cleared
(See note
2.)
Status at
or mode
change
startup
Section 8-2
No
No
OK
OK
No (See
note 5.)
No (See
note 6.)
No
No
No
Forcing
bit sta-
tus

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