FDG6321C Fairchild Semiconductor, FDG6321C Datasheet - Page 3

• Manufacturer Part Number: FDG6321C
• Description: MOSFET N/P-CH DUAL 25V SC70-6
• Manufacturer: Fairchild Semiconductor

Specifications of FDG6321C

• Fet Type: N and P-Channel
• Fet Feature: Logic Level Gate
• Rds On (max) @ Id, Vgs: 450 mOhm @ 500mA, 4.5V
• Drain To Source Voltage (vdss): 25V
• Current - Continuous Drain (id) @ 25° C: 500mA, 410mA
• Vgs(th) (max) @ Id: 1.5V @ 250µA
• Gate Charge (qg) @ Vgs: 2.3nC @ 4.5V
• Input Capacitance (ciss) @ Vds: 50pF @ 10V
• Power - Max: 300mW
• Mounting Type: Surface Mount
• Package / Case: SC-70-6, SC-88, SOT-363
• Configuration: Dual
• Transistor Polarity: N and P-Channel
• Resistance Drain-source Rds (on): 0.45 Ohm @ 4.5 V @ N Channel
• Forward Transconductance Gfs (max / Min): 1.45 S, 0.9 S
• Drain-source Breakdown Voltage: 25 V
• Gate-source Breakdown Voltage: 8 V @ N Channel or - 8 V @ P Channel
• Continuous Drain Current: 0.5 A @ N Channel or 0.41 A @ P Channel
• Power Dissipation: 300 mW
• Maximum Operating Temperature: + 150 C
• Mounting Style: SMD/SMT
• Minimum Operating Temperature: - 55 C
• Continuous Drain Current Id: 500mA
• Drain Source Voltage Vds: 25V
• On Resistance Rds(on): 450mohm
• Rds(on) Test Voltage Vgs: 4.5V
• Threshold Voltage Vgs Typ: 800mV
• Rohs Compliant: Yes
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Other names: FDG6321C

Electrical Characteristics
SWITCHING CHARACTERISTICS
Symbol
t
t
t
t
Q
Q
Q
DRAIN-SOURCE DIODE CHARACTERISTICS AND MAXIMUM RATINGS
I
V
D(on)
r
D(off)
f
S
Notes:
1. R
2. Pulse Test: Pulse Width < 300µs, Duty Cycle < 2.0%.
SD
g
gs
gd
design while R
JA
is the sum of the junction-to-case and case-to-ambient thermal resistance where the case thermal reference is defined as the solder mounting surface of the drain pins. R
Parameter
Turn - On Delay Time
Turn - On Rise Time
Turn - Off Delay Time
Turn - Off Fall Time
Total Gate Charge
Gate-Source Charge
Gate-Drain Charge
Maximum Continuous Drain-Source Diode Forward Current
Drain-Source Diode Forward Voltage
CA
is determined by the user's board design. R
(Note 2)
(continued)
JA
= 415
O
C/W on minimum mounting pad on FR-4 board in still air.
Conditions
N-Channel
V
V
P-Channel
V
V
N-Channel
V
V
P- Channel
V
V
V
V
DD
GS
DD
GS
DS
GS
DS
GS
GS
GS
= 4.5 V, R
= 5 V, I
= 5 V, I
= -5 V, I
= -4.5 V, R
= 4.5 V
= -5 V, I
= -4.5 V
= 0 V, I
= 0 V, I
D
D
S
S
D
D
= 0.5 A,
= 0.5 A,
= 0.5 A
= -0.5 A
= -0.5 A,
= -0.41 A,
GEN
GEN
= 50
= 50
(Note 2)
(Note 2)
Type
N-Ch
N-Ch
N-Ch
N-Ch
N-Ch
N-Ch
N-Ch
N-Ch
N-Ch
P-Ch
P-Ch
P-Ch
P-Ch
P-Ch
P-Ch
P-Ch
P-Ch
P-Ch
Min
-0.85
Typ
1.64
0.38
0.31
0.45
0.29
8.5
1.1
0.8
17
55
13
35
3
7
8
JC
is guaranteed by
-0.25
FDG6321C Rev. D
Max
0.25
-1.2
2.3
1.5
1.2
15
18
16
30
80
25
60
6
Units
nS
nS
nS
nS
nC
nC
nC
A
V