FDG6317NZ Fairchild Semiconductor, FDG6317NZ Datasheet

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... Thermal Resistance, Junction-to-Ambient JA Package Marking and Ordering Information Device Marking Device .67 FDG6317NZ ©2009 Fairchild Semiconductor Corporation FDG6317NZ Rev.B1 (W) Features 0 Gate-Source Zener for ESD ruggedness (1.6kV Human Body Model). (Note 3) Low gate charge High performance trench technology for extremely low R Compact industry standard SC70-6 surface mount ...

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... R is guaranteed by design while Pulse Test: Pulse Width < 300 s, Duty Cycle < 2.0% 3. The diode connected between the gate and source serves only as protection against ESD. No gate overvoltage rating is implied. ©2009 Fairchild Semiconductor Corporation FDG6317NZ Rev.B1 ( 25°C unless otherwise noted A Test Conditions V ...

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... Figure 3. On-Resistance Variation with Temperature 125 1 GATE TO SOURCE VOLTAGE (V) GS Figure 5. Transfer Characteristics. ©2009 Fairchild Semiconductor Corporation FDG6317NZ Rev.B1 (W) 1.7 2.5V 1.5 1.3 2.0V 1.1 0.9 0 1.5 2 2.5 Figure 2. On-Resistance Variation with 1 0.8 0.6 0.4 0.2 75 100 125 150 ...

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... DRAIN-SOURCE VOLTAGE (V) DS Figure 9. Maximum Safe Operating Area 0.5 0.2 0.1 0.1 0.05 0.02 0.01 SINGLE PULSE 0.01 0.0001 0.001 Figure 11. Transient Thermal Response Curve. ©2009 Fairchild Semiconductor Corporation FDG6317NZ Rev.B1 (W) 100 15V 75 10V 0.6 0 Figure 8. Capacitance Characteristics. 10 100 s 8 1ms ...

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... Datasheet Identification Product Status Advance Information Formative / In Design Preliminary First Production No Identification Needed Full Production Obsolete Not In Production ©2009 Fairchild Semiconductor Corporation FDG6317NZ Rev.B1 (W) F-PFS™ PowerTrench ® FRFET PowerXS™ SM Global Power Resource Programmable Active Droop™ ® Green FPS™ ...