HUF76639S3ST Fairchild Semiconductor, HUF76639S3ST Datasheet
HUF76639S3ST
Specifications of HUF76639S3ST
Related parts for HUF76639S3ST
HUF76639S3ST Summary of contents
Page 1
... UIS Rating Curve • Switching Time vs R Ordering Information PART NUMBER HUF76639P3 HUF76639S3S NOTE: When ordering, use the entire part number. Add the suffix T to obtain the variant in tape and reel, e.g., HUF76639S3ST Unless Otherwise Specified DSS DGR , T J STG = 0 ...
Page 2
... Gate to Drain “Miller” Charge CAPACITANCE SPECIFICATIONS Input Capacitance Output Capacitance Reverse Transfer Capacitance Source to Drain Diode Specifications PARAMETER Source to Drain Diode Voltage Reverse Recovery Time Reverse Recovered Charge ©2001 Fairchild Semiconductor Corporation o C, Unless Otherwise Specified SYMBOL TEST CONDITIONS 250 (Figure 12) DSS ...
Page 3
... SINGLE PULSE 0. FIGURE 3. NORMALIZED MAXIMUM TRANSIENT THERMAL IMPEDANCE 1000 V = 10V GS 100 TRANSCONDUCTANCE V MAY LIMIT CURRENT IN THIS REGION ©2001 Fairchild Semiconductor Corporation 150 175 125 o C) FIGURE 2. MAXIMUM CONTINUOUS DRAIN CURRENT RECTANGULAR PULSE DURATION ( PULSE WIDTH (s) FIGURE 4. PEAK CURRENT CAPABILITY 60 50 ...
Page 4
... 15A GATE TO SOURCE VOLTAGE (V) GS FIGURE 9. DRAIN TO SOURCE ON RESISTANCE vs GATE VOLTAGE AND DRAIN CURRENT ©2001 Fairchild Semiconductor Corporation (Continued) 100 s 1ms 10ms 100 300 NOTE: Refer to Fairchild Application Notes AN9321 and AN9322. FIGURE 6. UNCLAMPED INDUCTIVE SWITCHING o C 3.0 3.5 4.0 o ...
Page 5
... DRAIN TO SOURCE VOLTAGE (V) DS FIGURE 13. CAPACITANCE vs DRAIN TO SOURCE VOLTAGE 400 V = 4.5V 50V 34A 300 t r 200 t f 100 GATE TO SOURCE RESISTANCE ( ) GS FIGURE 15. SWITCHING TIME vs GATE RESISTANCE ©2001 Fairchild Semiconductor Corporation (Continued 250 120 160 200 o C) FIGURE 12. NORMALIZED DRAIN TO SOURCE BREAKDOWN ISS OSS ...
Page 6
... Test Circuits and Waveforms VARY t TO OBTAIN P R REQUIRED PEAK FIGURE 17. UNCLAMPED ENERGY TEST CIRCUIT g(REF) FIGURE 19. GATE CHARGE TEST CIRCUIT FIGURE 21. SWITCHING TIME TEST CIRCUIT ©2001 Fairchild Semiconductor Corporation DUT 0. DUT g(REF DUT DSS FIGURE 18. UNCLAMPED ENERGY WAVEFORMS Q g(TOT) ...
Page 7
... S2BMOD VSWITCH (RON = 1e-5 ROFF = 0.1 VON = 0.3 VOFF = -0.5) .ENDS NOTE: For further discussion of the PSPICE model, consult A New PSPICE Sub-Circuit for the Power MOSFET Featuring Global Temperature Options; IEEE Power Electronics Specialist Conference Records, 1991, written by William J. Hepp and C. Frank Wheatley. ©2001 Fairchild Semiconductor Corporation DPLCAP 10 RSLC2 ...
Page 8
... Fairchild Semiconductor Corporation DPLCAP 10 RSLC2 - 6 ESG 8 EVTHRES ...
Page 9
... Fairchild Semiconductor Corporation JUNCTION th RTHERM1 CTHERM1 6 RTHERM2 CTHERM2 5 RTHERM3 CTHERM3 4 RTHERM4 CTHERM4 3 RTHERM5 ...
Page 10
... TRADEMARKS The following are registered and unregistered trademarks Fairchild Semiconductor owns or is authorized to use and is not intended exhaustive list of all such trademarks. ACEx™ FAST Bottomless™ FASTr™ FRFET™ CoolFET™ GlobalOptoisolator™ CROSSVOLT™ GTO™ DenseTrench™ ...