M29W256GH7AN6E NUMONYX, M29W256GH7AN6E Datasheet - Page 50

• Manufacturer Part Number: M29W256GH7AN6E
• Description: Flash Mem Parallel 3V/3.3V 256M-Bit 32M x 8/16M x 16 70ns 56-Pin TSOP Tray
• Manufacturer: NUMONYX

Specifications of M29W256GH7AN6E

• Package: 56TSOP
• Cell Type: NOR
• Density: 256 Mb
• Architecture: Sectored
• Block Organization: Symmetrical
• Location Of Boot Block: Bottom|Top
• Typical Operating Supply Voltage: 3|3.3 V
• Sector Size: 128KByte x 256
• Timing Type: Asynchronous
• Operating Temperature: -40 to 85 °C
• Interface Type: Parallel

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10. If an Entry Command Set command is issued, an Exit Protection Command Set command must be issued to return the device to read mode.
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Ad address, Dat data, BAd any address in the block, RD read data, PWDn password byte 0 to 7, PWAn password address (n = 0 to 7), X don’t
care. All values in the table are in hexadecimal.
Grey cells represent read cycles. The other cells are Write cycles.
DQ15 to DQ8 are ‘don’t care’ during unlock and command cycles. A23 to A16 are ‘don’t care’ during unlock and command cycles unless an
address is required.
An Enter command sequence must be issued prior to any operation. It disables read and write operations from and to block 0. Read and write
operations from any other block are allowed.
DATA = lock register content.
Protected and unprotected states correspond to 00 and 01, respectively.
The Clear all NVPBs command programs all NVPBs before erasure in order to prevent the over-erasure of previously cleared non volatile
modify protection bits.
Only one portion of password can be programmed or read by each Password Program command.
The password portion can be entered or read in any order as long as the entire 64-bit password is entered or read.