LAN9221-ABZJ Standard Microsystems (SMSC), LAN9221-ABZJ Datasheet - Page 29

• Manufacturer Part Number: LAN9221-ABZJ
• Manufacturer: Standard Microsystems (SMSC)

Specifications of LAN9221-ABZJ

• Operating Supply Voltage (typ): 1.8/2.5/3.3V
• Operating Supply Voltage (min): 1.62V
• Operating Supply Voltage (max): 3.6V
• Operating Temperature Classification: Commercial
• Mounting: Surface Mount
• Pin Count: 56
• Lead Free Status / RoHS Status: Compliant

High-Performance 16-bit Non-PCI 10/100 Ethernet Controller with Variable Voltage I/O
Datasheet
SMSC LAN9221/LAN9221i
3.5.1
FIELD
FIELD
15:0
7:0
The Filter i CRC-16 register contains the CRC-16 result of the frame that should pass Filter i.
Table 3.6
Magic Packet Detection
Setting the Magic Packet Enable bit (MPEN) in the “WUCSR—Wake-up Control and Status Register”,
places the LAN9221/LAN9221i MAC in the “Magic Packet” detection mode. In this mode, normal data
reception is disabled, and detection logic within the MAC examines receive data for a Magic Packet.
The LAN9221/LAN9221i can be programmed to notify the host of the “Magic Packet” detection with
the assertion of the host interrupt (IRQ) or assertion of the power management event signal (PME).
Upon detection, the Magic Packet Received bit (MPR) in the WUCSR is set. When the host clears the
MPEN bit the LAN9221/LAN9221i will resume normal receive operation. Please refer to
"WUCSR—Wake-up Control and Status Register," on page 116
register
In Magic Packet mode, the Power Management Logic constantly monitors each frame addressed to
the node for a specific Magic Packet pattern. It checks only packets with the MAC’s address or a
broadcast address to meet the Magic Packet requirement. The Power Management Logic checks each
received frame for the pattern 48h FF_FF_FF_FF_FF_FF after the destination and source address
field.
Then the Function looks in the frame for 16 repetitions of the MAC address without any breaks or
interruptions. In case of a break in the 16 address repetitions, the PMT Function scans for the
48'hFF_FF_FF_FF_FF_FF pattern again in the incoming frame.
The 16 repetitions may be anywhere in the frame but must be preceded by the synchronization stream.
The device will also accept a multicast frame, as long as it detects the 16 duplications of the MAC
address. If the MAC address of a node is 00h 11h 22h 33h 44h 55h, then the MAC scans for the
following data sequence in an Ethernet: Frame.
DESCRIPTION
Pattern Offset: The offset of the first byte in the frame on which CRC is checked for wake-up frame
recognition. The minimum value of this field must be 12 since there should be no CRC check for
the destination address and the source address fields. The MAC checks the first offset byte of the
frame for CRC and checks to determine whether the frame is a wake-up frame. Offset 0 is the first
byte of the incoming frame's destination address.
DESCRIPTION
Pattern CRC-16: This field contains the 16-bit CRC value from the pattern and the byte mask
programmed to the wake-up filter register Function. This value is compared against the CRC
calculated on the incoming frame, and a match indicates the reception of a wakeup frame.
describes the Filter i CRC-16 bit fields.
Table 3.6 Filter i CRC-16 Bit Definitions
Table 3.5 Filter i Offset Bit Definitions
FILTER I OFFSET DESCRIPTION
FILTER I CRC-16 DESCRIPTION
DATASHEET
29
for additional information on this
Revision 2.7 (03-15-10)
Section 5.4.12,