RD38F1020C0ZBL0 Intel, RD38F1020C0ZBL0 Datasheet - Page 25

• Manufacturer Part Number: RD38F1020C0ZBL0
• Manufacturer: Intel

Specifications of RD38F1020C0ZBL0

• Operating Supply Voltage (max): 3.3V
• Operating Temperature (max): 85C
• Mounting: Surface Mount
• Lead Free Status / RoHS Status: Not Compliant

4.0
4.1
4.2
4.2.1
4.2.2
Datasheet
Power and Reset Considerations
Power-Up/Down Characteristics
In order to prevent any condition that may result in a spurious write or erase operation, it is
recommended to power-up F-V
S-V
F-V
If F-V
V
voltage = F-V
Additional Flash Features
C3 SCSP products provide in-system programming and erase in the 1.65 V–3.3 V range. For fast
production programming, it also includes a low-cost, backward-compatible 12 V programming
feature.
Improved 12 Volt Production Programming
When F-V
F-V
remain above 1.65 V to perform in-system flash modifications. When F-V
power supply, the device draws program and erase current directly from the F-V
eliminates the need for an external switching transistor to control the voltage F-V
“Example Power Supply Configurations” on page 43
supplies can be configured for various usage models.
The 12 V F-V
typically found in manufacturing processes; however, it is not intended for extended use. 12 V may
be applied to F-V
main blocks and 2500 cycles on the parameter blocks. F-V
of 80 hours maximum. Stressing the device beyond these limits may cause permanent damage.
F-V
In addition to the flexible block locking, the F-V
absolute hardware write protection of all blocks in the flash device. When F-V
any program or erase operation will result in a error, prompting the corresponding status register bit
(SR.3) to be set.
CC
C3 SCSP Flash Memory
CC
CC
CC
Min before applying F-V
PP
CCQ
Intel
. Conversely, F-V
must power-down together. It is also recommended to power-up F-V
signal. Note that if F-V
≤ V
PP
and/or F-V
®
PPLK
Advanced+ Boot Block Flash Memory (C3) SCSP Family
is between 1.65 V and 3.3 V, all program and erase current is drawn through the
CC
PP
Min. Power supply transitions should only occur when F-RP# is low.
mode enhances programming performance during the short period of time
PP
Order Number: 252636, Revision: 004
during program and erase operations for a maximum of 1000 cycles on the
for Complete Protection
PP
PP
are not connected to the F-V
must power down with or slightly before F-V
CCQ
PP
CC
is driven by a logic signal, V
, F-V
and F-V
CCQ
PP
and S-V
. Device inputs should not be driven before supply
PP
programming voltage can be held low for
CC
CC
shows examples of how the flash power
together. Conversely, F-V
supply, then F-V
PP
may be connected to 12 V for a total
IH
min = 1.65 V. That is, F-V
CC
CC
PP
PP
.
should attain F-
is connected to a 12 V
with or slightly after
PP
PP
CC
PP
is below V
signal. This
.
, F-V
Figure 12
26 Aug 2005
CCQ
PP
PPLK
must
and
25
,