MT47H64M16HR-3:H Micron Technology Inc, MT47H64M16HR-3:H Datasheet - Page 101
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MT47H64M16HR-3:H
Manufacturer Part Number
MT47H64M16HR-3:H
Description
IC DDR2 SDRAM 1GBIT 84FBGA
Manufacturer
Micron Technology Inc
Type
DDR2 SDRAMr
Series
-r
Datasheet
1.MT47H64M16HR-3H.pdf
(134 pages)
Specifications of MT47H64M16HR-3:H
Organization
64Mx16
Density
1Gb
Address Bus
16b
Access Time (max)
450ps
Maximum Clock Rate
667MHz
Operating Supply Voltage (typ)
1.8V
Package Type
FBGA
Operating Temp Range
0C to 85C
Operating Supply Voltage (max)
1.9V
Operating Supply Voltage (min)
1.7V
Supply Current
135mA
Pin Count
84
Mounting
Surface Mount
Operating Temperature Classification
Commercial
Format - Memory
RAM
Memory Type
DDR2 SDRAM
Memory Size
1G (64M x 16)
Speed
3ns
Interface
Parallel
Voltage - Supply
1.7 V ~ 1.9 V
Operating Temperature
0°C ~ 85°C
Package / Case
84-TFBGA
Lead Free Status / RoHS Status
Compliant
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
MT47H64M16HR-3:H
Manufacturer:
MICRON
Quantity:
11 200
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Part Number:
MT47H64M16HR-3:H
Manufacturer:
MICRON
Quantity:
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Part Number:
MT47H64M16HR-3:H
Manufacturer:
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Company:
Part Number:
MT47H64M16HR-3:H
Manufacturer:
Micron Technology Inc
Quantity:
10 000
Part Number:
MT47H64M16HR-3:H
Manufacturer:
MICRON
Quantity:
20 000
Company:
Part Number:
MT47H64M16HR-3:H TR
Manufacturer:
Micron Technology Inc
Quantity:
10 000
Figure 53: Bank Read – with Auto Precharge
PDF: 09005aef821ae8bf
1GbDDR2.pdf – Rev. V 6/10 EN
Bank address
Command 1
DQS, DQS#
DQS, DQS#
Case 2: t AC (MAX) and t DQSCK (MAX)
Case 1: t AC (MIN) and t DQSCK (MIN)
Address
DQ 6
DQ 6
CK#
CKE
A10
DM
CK
NOP 1
T0
Notes:
Bank x
ACT
RA
RA
T1
1. NOP commands are shown for ease of illustration; other commands may be valid at
2. BL = 4, RL = 4 (AL = 1, CL = 3) in the case shown.
3. The DDR2 SDRAM internally delays auto precharge until both
4. Enable auto precharge.
5. I/O balls, when entering or exiting High-Z, are not referenced to a specific voltage level,
6. DO n = data-out from column n; subsequent elements are applied in the programmed
t CK
these times.
have been satisfied.
but to when the device begins to drive or no longer drives, respectively.
order.
t RCD
t RAS
t RC
NOP 1
T2
t CH
t CL
READ 2,3
Bank x
Col n
4
T3
AL = 1
prefetch
4-bit
101
NOP 1
T4
t RTP
NOP 1
Micron Technology, Inc. reserves the right to change products or specifications without notice.
T5
t LZ (MIN)
t LZ (MAX)
CL = 3
Internal
precharge
1Gb: x4, x8, x16 DDR2 SDRAM
5
NOP 1
T6
5
t RPRE
t LZ (MIN)
t LZ (MAX)
t RPRE
NOP 1
Transitioning Data
T7
t DQSCK (MIN)
t RP
DO
t DQSCK (MAX)
t AC (MIN)
n
t AC (MAX)
DO
© 2004 Micron Technology, Inc. All rights reserved.
n
T7n
t
RAS (MIN) and
NOP 1
T8
t HZ (MIN)
t HZ (MAX)
T8n
t RPST
t RPST
Don’t Care
Bank x
ACT
RA
5
RA
t
RTP (MIN)
5
READ