MT47H64M16HR-3:H Micron Technology Inc, MT47H64M16HR-3:H Datasheet - Page 14
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MT47H64M16HR-3:H
Manufacturer Part Number
MT47H64M16HR-3:H
Description
IC DDR2 SDRAM 1GBIT 84FBGA
Manufacturer
Micron Technology Inc
Type
DDR2 SDRAMr
Series
-r
Datasheet
1.MT47H64M16HR-3H.pdf
(134 pages)
Specifications of MT47H64M16HR-3:H
Organization
64Mx16
Density
1Gb
Address Bus
16b
Access Time (max)
450ps
Maximum Clock Rate
667MHz
Operating Supply Voltage (typ)
1.8V
Package Type
FBGA
Operating Temp Range
0C to 85C
Operating Supply Voltage (max)
1.9V
Operating Supply Voltage (min)
1.7V
Supply Current
135mA
Pin Count
84
Mounting
Surface Mount
Operating Temperature Classification
Commercial
Format - Memory
RAM
Memory Type
DDR2 SDRAM
Memory Size
1G (64M x 16)
Speed
3ns
Interface
Parallel
Voltage - Supply
1.7 V ~ 1.9 V
Operating Temperature
0°C ~ 85°C
Package / Case
84-TFBGA
Lead Free Status / RoHS Status
Compliant
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
MT47H64M16HR-3:H
Manufacturer:
MICRON
Quantity:
11 200
Company:
Part Number:
MT47H64M16HR-3:H
Manufacturer:
MICRON
Quantity:
20 000
Company:
Part Number:
MT47H64M16HR-3:H
Manufacturer:
MICRON44
Quantity:
7 907
Company:
Part Number:
MT47H64M16HR-3:H
Manufacturer:
Micron Technology Inc
Quantity:
10 000
Part Number:
MT47H64M16HR-3:H
Manufacturer:
MICRON
Quantity:
20 000
Company:
Part Number:
MT47H64M16HR-3:H TR
Manufacturer:
Micron Technology Inc
Quantity:
10 000
Figure 5: 64 Meg x 16 Functional Block Diagram
PDF: 09005aef821ae8bf
1GbDDR2.pdf – Rev. V 6/10 EN
BA0–BA2
A0–A12,
RAS#
CAS#
WE#
ODT
CKE
CK#
CS#
CK
16
Address
register
registers
Mode
Control
logic
16
Refresh
counter
13
10
3
13
address
2
Row-
MUX
13
control
Bank
logic
Column-
counter/
address
latch
decoder
address
Bank 0
row-
latch
and
Bank 1
Bank 2
Bank 3
Bank 4
8
2
8,192
Bank 5
Bank 6
Bank 7
DM mask logic
(8,192 x 256 x 64)
I/O gating
Memory array
Sense amplifier
decoder
Column
16,384
(x64)
256
Bank 0
Bank 1
Bank 2
Bank 3
Bank 4
Bank 5
Bank 6
Bank 7
14
COL0, COL1
CK, CK#
64
64
64
Micron Technology, Inc. reserves the right to change products or specifications without notice.
Read
latch
CK out
WRITE
drivers
CK in
FIFO
and
16
16
16
16
Mask
Data
COL0, COL1
8
64
MUX
1Gb: x4, x8, x16 DDR2 SDRAM
generator
2
2
2
16
16
16
16
2
DQS
registers
Input
DATA
Functional Block Diagrams
16
UDQS, UDQS#
LDQS, LDQS#
2
2
2
2
16
16
16
16
4
16
CK, CK#
2
DRVRS
4
DLL
RCVRS
© 2004 Micron Technology, Inc. All rights reserved.
sw1 sw2
sw1 sw2
sw1 sw2
sw1 sw2
R1
R1
R1
R1
R1
R1
ODT control
R2
R2
R2
R2
R2
R2
V
ss
Q
sw3
sw3
sw3
sw3
R3
R3
R3
R3
R3
R3
V
dd
Q
DQ0–DQ15
UDQS, UDQS#
LDQS, LDQS#
UDM, LDM