MT47H64M16HR-3:H Micron Technology Inc, MT47H64M16HR-3:H Datasheet - Page 29
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MT47H64M16HR-3:H
Manufacturer Part Number
MT47H64M16HR-3:H
Description
IC DDR2 SDRAM 1GBIT 84FBGA
Manufacturer
Micron Technology Inc
Type
DDR2 SDRAMr
Series
-r
Datasheet
1.MT47H64M16HR-3H.pdf
(134 pages)
Specifications of MT47H64M16HR-3:H
Organization
64Mx16
Density
1Gb
Address Bus
16b
Access Time (max)
450ps
Maximum Clock Rate
667MHz
Operating Supply Voltage (typ)
1.8V
Package Type
FBGA
Operating Temp Range
0C to 85C
Operating Supply Voltage (max)
1.9V
Operating Supply Voltage (min)
1.7V
Supply Current
135mA
Pin Count
84
Mounting
Surface Mount
Operating Temperature Classification
Commercial
Format - Memory
RAM
Memory Type
DDR2 SDRAM
Memory Size
1G (64M x 16)
Speed
3ns
Interface
Parallel
Voltage - Supply
1.7 V ~ 1.9 V
Operating Temperature
0°C ~ 85°C
Package / Case
84-TFBGA
Lead Free Status / RoHS Status
Compliant
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
MT47H64M16HR-3:H
Manufacturer:
MICRON
Quantity:
11 200
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Part Number:
MT47H64M16HR-3:H
Manufacturer:
MICRON
Quantity:
20 000
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Part Number:
MT47H64M16HR-3:H
Manufacturer:
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Company:
Part Number:
MT47H64M16HR-3:H
Manufacturer:
Micron Technology Inc
Quantity:
10 000
Part Number:
MT47H64M16HR-3:H
Manufacturer:
MICRON
Quantity:
20 000
Company:
Part Number:
MT47H64M16HR-3:H TR
Manufacturer:
Micron Technology Inc
Quantity:
10 000
Table 10: DDR2 I
Notes: 1–7 apply to the entire table
PDF: 09005aef821ae8bf
1GbDDR2.pdf – Rev. V 6/10 EN
Parameter/Condition
Operating burst write current:
All banks open, continuous burst
writes; BL = 4, CL = CL (I
t
(I
CS# is HIGH between valid com-
mands; Address bus inputs are
switching; Data bus inputs are
switching
Operating burst read current:
All banks open, continuous burst
reads, I
(I
t
is HIGH, CS# is HIGH between valid
commands; Address bus inputs are
switching; Data bus inputs are
switching
Burst refresh current:
(I
t
is HIGH between valid commands;
Other control and address bus in-
puts are switching; Data bus inputs
are switching
Self refresh current: CK and CK#
at 0V; CKE ≤ 0.2V; Other control
and address bus inputs are floating;
Data bus inputs are floating
Operating bank interleave read
current: All bank interleaving
reads, I
(I
t
=
is HIGH, CS# is HIGH between valid
commands; Address bus inputs are
stable during deselects; Data bus in-
puts are switching; See on page
for details
CK =
RAS MAX (I
RFC (I
CK =
DD
DD
DD
DD
t
RRD (I
),
), AL = 0;
); REFRESH command at every
), AL =
t
t
t
RP =
DD
CK (I
CK (I
OUT
OUT
) interval; CKE is HIGH, CS#
DD
t
),
DD
= 0mA; BL = 4, CL = CL
= 0mA; BL = 4, CL = CL
DD
t
RCD (I
RP (I
DD
t
t
),
),
RCD =
CK =
),
t
t
RAS =
RC =
DD
t
RP =
DD
); CKE is HIGH,
t
DD
CK (I
) - 1 ×
t
RCD (I
t
RC (I
Notes:
t
t
RP (I
Specifications and Conditions (Die Revisions E and G) (Continued)
RAS MAX
DD
DD
t
CK =
t
), AL = 0;
DD
),
CK (I
DD
DD
t
),
RAS =
); CKE
); CKE
t
t
1. I
2. V
3. I
CK
RRD
DD
);
DD
DD
DD
specifications are tested after the device is properly initialized. 0°C ≤ T
parameters are specified with ODT disabled.
Symbol
= +1.8V ±0.1V, V
I
I
I
DD4W
I
I
I
DD4R
DD6L
DD5
DD6
DD7
Configuration
x4, x8, x16
x4, x8
x4, x8
DDQ
x16
x16
x16
x16
x4
x8
x4
x8
= +1.8V ±0.1V, V
29
Electrical Specifications – I
-187E
190
210
405
190
210
420
265
300
425
520
7
5
Micron Technology, Inc. reserves the right to change products or specifications without notice.
DDL
-25E/
145
160
315
145
160
320
235
280
335
440
-25
7
5
1Gb: x4, x8, x16 DDR2 SDRAM
= +1.8V ±0.1V, V
-3E/
120
135
200
120
135
220
215
270
280
350
-3
7
5
© 2004 Micron Technology, Inc. All rights reserved.
-37E
110
125
180
110
125
180
210
250
270
330
REF
7
5
= V
DD
DDQ
105
160
105
160
205
240
260
300
-5E
90
90
Parameters
/2.
7
5
C
≤ +85°C.
Units
mA
mA
mA
mA
mA