MT47H64M16HR-3:H Micron Technology Inc, MT47H64M16HR-3:H Datasheet - Page 18
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MT47H64M16HR-3:H
Manufacturer Part Number
MT47H64M16HR-3:H
Description
IC DDR2 SDRAM 1GBIT 84FBGA
Manufacturer
Micron Technology Inc
Type
DDR2 SDRAMr
Series
-r
Datasheet
1.MT47H64M16HR-3H.pdf
(134 pages)
Specifications of MT47H64M16HR-3:H
Organization
64Mx16
Density
1Gb
Address Bus
16b
Access Time (max)
450ps
Maximum Clock Rate
667MHz
Operating Supply Voltage (typ)
1.8V
Package Type
FBGA
Operating Temp Range
0C to 85C
Operating Supply Voltage (max)
1.9V
Operating Supply Voltage (min)
1.7V
Supply Current
135mA
Pin Count
84
Mounting
Surface Mount
Operating Temperature Classification
Commercial
Format - Memory
RAM
Memory Type
DDR2 SDRAM
Memory Size
1G (64M x 16)
Speed
3ns
Interface
Parallel
Voltage - Supply
1.7 V ~ 1.9 V
Operating Temperature
0°C ~ 85°C
Package / Case
84-TFBGA
Lead Free Status / RoHS Status
Compliant
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
MT47H64M16HR-3:H
Manufacturer:
MICRON
Quantity:
11 200
Company:
Part Number:
MT47H64M16HR-3:H
Manufacturer:
MICRON
Quantity:
20 000
Company:
Part Number:
MT47H64M16HR-3:H
Manufacturer:
MICRON44
Quantity:
7 907
Company:
Part Number:
MT47H64M16HR-3:H
Manufacturer:
Micron Technology Inc
Quantity:
10 000
Part Number:
MT47H64M16HR-3:H
Manufacturer:
MICRON
Quantity:
20 000
Company:
Part Number:
MT47H64M16HR-3:H TR
Manufacturer:
Micron Technology Inc
Quantity:
10 000
Table 3: FBGA 84-Ball – x16 and 60-Ball – x4, x8 Descriptions (Continued)
PDF: 09005aef821ae8bf
1GbDDR2.pdf – Rev. V 6/10 EN
UDQS, UDQS#
RDQS, RDQS#
LDQS, LDQS#
DQS, DQS#
Symbol
V
V
V
V
V
RFU
V
V
NC
NU
NU
NF
DDQ
SSDL
DDL
REF
SSQ
DD
SS
Output
Supply
Supply
Supply
Supply
Supply
Supply
Supply
Type
I/O
I/O
I/O
–
–
–
–
–
Description
Data strobe: Output with read data, input with write data for source synchronous oper-
ation. Edge-aligned with read data, center-aligned with write data. DQS# is only used
when differential data strobe mode is enabled via the LOAD MODE command.
Data strobe for lower byte: Output with read data, input with write data for source
synchronous operation. Edge-aligned with read data, center-aligned with write data.
LDQS# is only used when differential data strobe mode is enabled via the LOAD MODE
command.
Data strobe for upper byte: Output with read data, input with write data for source
synchronous operation. Edge-aligned with read data, center-aligned with write data.
UDQS# is only used when differential data strobe mode is enabled via the LOAD MODE
command.
Redundant data strobe: For x8 only. RDQS is enabled/disabled via the LOAD MODE com-
mand to the extended mode register (EMR). When RDQS is enabled, RDQS is output with
read data only and is ignored during write data. When RDQS is disabled, ball B3 becomes
data mask (see DM ball). RDQS# is only used when RDQS is enabled and differential data
strobe mode is enabled.
Power supply: 1.8V ±0.1V.
DQ power supply: 1.8V ±0.1V. Isolated on the device for improved noise immunity.
DLL power supply: 1.8V ±0.1V.
SSTL_18 reference voltage (V
Ground.
DLL ground: Isolated on the device from V
DQ ground: Isolated on the device for improved noise immunity.
No connect: These balls should be left unconnected.
No function: x8: these balls are used as DQ[7:4]; x4: they are no function.
Not used: For x16 only. If EMR(E10) = 0, A8 and E8 are UDQS# and LDQS#. If EMR(E10) =
1, then A8 and E8 are not used.
Not used: For x8 only. If EMR(E10) = 0, A2 and E8 are RDQS# and DQS#. If EMR(E10) = 1,
then A2 and E8 are not used.
Reserved for future use: Row address bits A13 (x16 only), A14, and A15.
18
DDQ
/2).
Micron Technology, Inc. reserves the right to change products or specifications without notice.
Ball Assignments and Descriptions
SS
and V
1Gb: x4, x8, x16 DDR2 SDRAM
SSQ
.
© 2004 Micron Technology, Inc. All rights reserved.