MT41J256M4JP-15E:G Micron Technology Inc, MT41J256M4JP-15E:G Datasheet - Page 111

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MT41J256M4JP-15E:G

Manufacturer Part Number
MT41J256M4JP-15E:G
Description
IC DDR3 SDRAM 1GBIT 78FBGA
Manufacturer
Micron Technology Inc
Series
-r

Specifications of MT41J256M4JP-15E:G

Format - Memory
RAM
Memory Type
DDR3 SDRAM
Memory Size
1G (256M x 4)
Speed
667MHz
Interface
Parallel
Voltage - Supply
1.425 V ~ 1.575 V
Operating Temperature
0°C ~ 95°C
Package / Case
78-TFBGA
Lead Free Status / RoHS Status
Supplier Unconfirmed

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
MT41J256M4JP-15E:G
Manufacturer:
Micron Technology Inc
Quantity:
10 000
PDF: 09005aef826aa906
1Gb_DDR3_SDRAM.pdf – Rev. J 05/10 EN
10. The DES and NOP commands perform similarly.
11. The power-down mode does not perform any REFRESH operations.
12. ZQ CALIBRATION LONG is used for either ZQinit (first ZQCL command during initializa-
2. RESET# is LOW enabled and used only for asynchronous reset. Thus, RESET# must be
3. The state of ODT does not affect the states described in this table.
4. Operations apply to the bank defined by the bank address. For MRS, BA selects one of
5. “V” means “H” or “L” (a defined logic level), and “X” means “Don’t Care.”
6. See Table 68 (page 112) for additional information on CKE transition.
7. Self refresh exit is asynchronous.
8. Burst READs or WRITEs cannot be terminated or interrupted. MRS (fixed) and OTF BL/BC
9. The purpose of the NOP command is to prevent the DRAM from registering any unwan-
held HIGH during any normal operation.
four mode registers.
are defined in MR0.
ted commands. A NOP will not terminate an operation that is executing.
tion) or ZQoper (ZQCL command after initialization).
111
Micron Technology, Inc. reserves the right to change products or specifications without notice.
1Gb: x4, x8, x16 DDR3 SDRAM
Commands – Truth Tables
© 2006 Micron Technology, Inc. All rights reserved.

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