NH82801DB S L8DE Intel, NH82801DB S L8DE Datasheet - Page 313

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NH82801DB S L8DE

Manufacturer Part Number
NH82801DB S L8DE
Description
Manufacturer
Intel
Datasheet

Specifications of NH82801DB S L8DE

Lead Free Status / RoHS Status
Compliant
9.1.36
Intel
®
82801DB ICH4 Datasheet
FUNC_DIS—Function Disable Register (LPC I/F—D31:F0)
Offset Address:
Default Value:
Lockable:
13:11
Bit
15
14
10
9
8
7
6
5
4
D29_F7_Disable — R/W. Software sets this bit to disable the USB EHCI controller function. BIOS
must not enable I/O or memory address space decode, interrupt generation, or any other
functionality of functions that are to be disabled
0 = Enable. USB EHCI controller is enabled
1 = Disable. USB EHCI controller is disabled
LPC Bridge Disable (D31F0D) — R/W.
0 = Enable.
1 = Disable LPC bridge. When disabled, the following spaces will no longer be decoded by the LPC
Reserved
D29_F2_Disable — R/W. Software sets this bit to disable the USB UHCI controller #3 function.
BIOS must not enable I/O or memory address space decode, interrupt generation, or any other
functionality of functions that are to be disabled
0 = Enable. USB UHCI controller #3 is enabled
1 = Disable. USB UHCI controller #3 is disabled
D29_F1_Disable — R/W. Software sets this bit to disable the USB UHCI controller #2 function.
BIOS must not enable I/O or memory address space decode, interrupt generation, or any other
functionality of functions that are to be disabled
0 = Enable. USB UHCI controller #2 is enabled
1 = Disable. USB UHCI controller #2 is disabled
D29_F0_Disable — R/W. Software sets this bit to disable the USB UHCI controller #1
function.BIOS must not enable I/O or memory address space decode, interrupt generation, or any
other functionality of functions that are to be disabled
0 = Enable. USB UHCI controller #1 is enabled
1 = Disable. USB UHCI controller #1 is disabled
Reserved
D31_F6_Disable — R/W. Software sets this bit to disable the AC ’97 modem controller function.
BIOS must not enable I/O or memory address space decode, interrupt generation, or any other
functionality of functions that are to be disabled
0 = Enable. AC ’97 Modem is enabled
1 = Disable. AC ’97 Modem is disabled
D31_F5_Disable — R/W. Software sets this bit to disable the AC ’97 audio controller function. BIOS
must not enable I/O or memory address space decode, interrupt generation, or any other
functionality of functions that are to be disabled
0 = Enable. AC ’97 audio controller is enabled
1 = Disable. AC ’97 audio controller is disabled
Reserved
bridge:
– Device 31, Function 0 Configuration space
– Memory cycles below 16 MB (100000h)
– I/O cycles below 64 KB (100h)
– The Internal I/OxAPIC at FEC0_0000 to FECF_FFFF
Memory cycles in the LPC BIOS range below 4GB will still be decoded when this bit is set, but
the aliases at the top of 1 MB (the E and F segment) no longer will be decoded.
F2h
00h
No
Description
Attribute:
Size:
Power Well:
.
.
.
.
.
LPC Interface Bridge Registers (D31:F0)
.
R/W
16 bits
Core
313

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