NH82801DB S L8DE Intel, NH82801DB S L8DE Datasheet - Page 315

• Manufacturer Part Number: NH82801DB S L8DE
• Manufacturer: Intel

Specifications of NH82801DB S L8DE

• Lead Free Status / RoHS Status: Compliant

9.2
Intel
®
Table 9-2. DMA Registers
82801DB ICH4 Datasheet
DMA I/O Registers
8Ch–8Eh
84h–86h
Port
CCh
DCh
CAh
CEh
DAh
DEh
0Ah
0Bh
0Ch
0Dh
0Eh
0Fh
8Ah
8Bh
8Fh
C0h
C2h
C4h
C6h
C8h
D0h
D4h
D6h
D8h
00h
01h
02h
03h
04h
05h
06h
07h
08h
80h
81h
82h
83h
87h
88h
89h
9Ch–9Eh
94h–96h
Alias
CBh
CDh
DBh
DDh
1Ch
1Dh
C1h
C3h
C5h
C7h
C9h
CFh
D1h
D5h
D7h
D9h
DFh
10h
12h
13h
14h
15h
16h
17h
1Ah
1Bh
1Eh
1Fh
90h
91h
93h
97h
98h
99h
9Ah
9Bh
9Fh
11h
18h
—
Channel 0 DMA Base & Current Address Register
Channel 0 DMA Base & Current Count Register
Channel 1 DMA Base & Current Address Register
Channel 1 DMA Base & Current Count Register
Channel 2 DMA Base & Current Address Register
Channel 2 DMA Base & Current Count Register
Channel 3 DMA Base & Current Address Register
Channel 3 DMA Base & Current Count Register
Channel 0–3 DMA Command Register
Channel 0–3 DMA Status Register
Channel 0–3 DMA Write Single Mask Register
Channel 0–3 DMA Channel Mode Register
Channel 0–3 DMA Clear Byte Pointer Register
Channel 0–3 DMA Master Clear Register
Channel 0–3 DMA Clear Mask Register
Channel 0–3 DMA Write All Mask Register
Reserved Page Register
Channel 2 DMA Memory Low Page Register
Channel 3 DMA Memory Low Page Register
Channel 1 DMA Memory Low Page Register
Reserved Page Registers
Channel 0 DMA Memory Low Page Register
Reserved Page Register
Channel 6 DMA Memory Low Page Register
Channel 7 DMA Memory Low Page Register
Channel 5 DMA Memory Low Page Register
Reserved Page Registers
Refresh Low Page Register
Channel 4 DMA Base & Current Address Register
Channel 4 DMA Base & Current Count Register
Channel 5 DMA Base & Current Address Register
Channel 5 DMA Base & Current Count Register
Channel 6 DMA Base & Current Address Register
Channel 6 DMA Base & Current Count Register
Channel 7 DMA Base & Current Address Register
Channel 7 DMA Base & Current Count Register
Channel 4–7 DMA Command Register
Channel 4–7 DMA Status Register
Channel 4–7 DMA Write Single Mask Register
Channel 4–7 DMA Channel Mode Register
Channel 4–7 DMA Clear Byte Pointer Register
Channel 4–7 DMA Master Clear Register
Channel 4–7 DMA Clear Mask Register
Channel 4–7 DMA Write All Mask Register
Register Name
LPC Interface Bridge Registers (D31:F0)
000001XXb
000000XXb
000001XXb
000000XXb
Undefined
Undefined
Undefined
Undefined
Undefined
Undefined
Undefined
Undefined
Undefined
Undefined
Undefined
Undefined
Undefined
Undefined
Undefined
Undefined
Undefined
Undefined
Undefined
Undefined
Undefined
Undefined
Undefined
Undefined
Undefined
Undefined
Undefined
Undefined
Undefined
Undefined
Undefined
Undefined
Undefined
Undefined
Undefined
Undefined
Undefined
Undefined
Default
0Fh
0Fh
Type
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
WO
WO
WO
WO
WO
WO
WO
WO
WO
WO
WO
WO
RO
RO
315