FW82801EB S L73Z Intel, FW82801EB S L73Z Datasheet - Page 236

• Manufacturer Part Number: FW82801EB S L73Z
• Manufacturer: Intel

Specifications of FW82801EB S L73Z

• Lead Free Status / RoHS Status: Not Compliant

Functional Description
236
Table 110. Process Call Protocol without PEC
Note: For process call command, the value written into bit 0 of the Transmit Slave Address Register
Process Call
The process call is so named because a command sends data and waits for the slave to return a
value dependent on that data. The protocol is simply a Write Word followed by a Read Word, but
without a second command or stop condition.
When programmed for the Process Call command, the ICH5 transmits the Transmit Slave Address,
Host Command, DATA0 and DATA1 registers. Data received from the device is stored in the
DATA0 and DATA1 registers. The Process Call command with I2C_EN set and the PEC_EN bit
set produces undefined results. Software must force either I2C_EN or PEC_EN to 0 when running
this command. The format of the protocol is shown in
(SMB I/O register, offset 04h) needs to be 0.
18:11
27:20
36:29
45:39
55:48
64:57
8:2
Bit
10
19
28
37
38
46
47
56
65
66
1
9
Start
Slave Address — 7 bits
Write
Acknowledge from Slave
Command code — 8 bits (Skip this step if I2C_EN bit is set)
Acknowledge from slave (Skip this step if I2C_EN bit is set)
Data byte Low — 8 bits
Acknowledge from slave
Data Byte High — 8 bits
Acknowledge from slave
Repeated Start
Slave Address — 7 bits
Read
Acknowledge from slave
Data Byte Low from slave — 8 bits
Acknowledge
Data Byte High from slave — 8 bits
NOT acknowledge
Stop
Description
Intel
®
82801EB ICH5 / 82801ER ICH5R Datasheet
Table 110
and
Table
111.