FW82801EB S L73Z Intel, FW82801EB S L73Z Datasheet - Page 54
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FW82801EB S L73Z
Manufacturer Part Number
FW82801EB S L73Z
Description
Manufacturer
Intel
Datasheet
1.FW82801EB_S_L73Z.pdf
(671 pages)
Specifications of FW82801EB S L73Z
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Signal Description
2.6
54
Table 7.
Table 8.
PCI Interface Signals (Sheet 3 of 3)
Serial ATA Interface
Serial ATA Interface Signals
SATARBIAS#
SATARBIAS
PCIRST#
SATA0RXN
SATA1RXN
PLOCK#
SATA0TXP
SATA0TXN
SATA0RXP
SATA1TXN
SATA1RXP
SATALED#
REQA# /
REQB# /
GNTA# /
GNTB# /
SATA1TXP
REQ5# /
GNT5# /
GPIO16
GPIO17
SERR#
GPIO0
GPIO1
Name
PME#
Name
Type
I/OD
I/OD
I/O
O
O
I
Type
OD
O
O
I
I
I
PCI Reset: ICH5 asserts PCIRST# to reset devices that reside on the PCI bus.
The ICH5 asserts PCIRST# during power-up and when S/W initiates a hard reset
sequence through the RC (CF9h) register. The ICH5 drives PCIRST# inactive a
minimum of 1 ms after PWROK is driven active. The ICH5 drives PCIRST# active a
minimum of 1 ms when initiated through the RC register.
PCI Lock: This signal indicates an exclusive bus operation and may require
multiple transactions to complete. ICH5 asserts PLOCK# when it performs non-
exclusive transactions on the PCI bus. PLOCK# is ignored when PCI masters are
granted the bus.
System Error: SERR# can be pulsed active by any PCI device that detects a
system error condition. Upon sampling SERR# active, the ICH5 has the ability to
generate an NMI, SMI#, or interrupt.
PCI Power Management Event: PCI peripherals drive PME# to wake the system
from low-power states S1–S5. PME# assertion can also be enabled to generate an
SCI from the S0 state. In some cases the ICH5 may drive PME# active due to an
internal wake event. The ICH5 will not drive PME# high, but it will be pulled up to
VccSus3_3 by an internal pull-up resistor.
PC/PCI DMA Request [A:B]: This request serializes ISA-like DMA requests for
the purpose of running ISA-compatible DMA cycles over the PCI bus. This is used
by devices such as PCI based Super I/O or audio codecs that need to perform
legacy 8237 DMA but have no ISA bus.
When not used for PC/PCI requests, these signals can be used as general purpose
Inputs. REQB# can instead be used as the 6th PCI bus request.
PC/PCI DMA Acknowledges [A: B]: This grant serializes an ISA-like DACK# for
the purpose of running DMA/ISA Master cycles over the PCI bus. This is used by
devices such as PCI based Super/IO or audio codecs which need to perform
legacy 8237 DMA but have no ISA bus.
When not used for PC/PCI, these signals can be used as General Purpose
Outputs. GNTB# can also be used as the 6th PCI bus master grant output. These
signal have internal pull-up resistors.
Serial ATA 0 Differential Transmit Pair: These are outbound high-speed
differential signals to Port 0.
Serial ATA 0 Differential Receive Pair: These are inbound high-speed
differential signals from Port 0.
Serial ATA 1 Differential Transmit Pair: These are outbound high-speed
differential signals to Port 1.
Serial ATA 1 Differential Receive Pair: These are inbound high-speed
differential signals from Port 1.
Serial ATA Resistor Bias: These are analog connection points for an external
resistor to ground.
SATA Drive Activity Indicator: This signal indicates SATA drive activity when
driven low.
Intel
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