NQ5000P S L9TN Intel, NQ5000P S L9TN Datasheet - Page 145
NQ5000P S L9TN
Manufacturer Part Number
NQ5000P S L9TN
Description
Manufacturer
Intel
Datasheet
1.NQ5000P_S_L9TN.pdf
(530 pages)
Specifications of NQ5000P S L9TN
Mounting
Surface Mount
Lead Free Status / RoHS Status
Not Compliant
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Register Description
3.8.11.6
Intel® 5000P/5000V/5000Z Chipset Memory Controller Hub (MCH) Datasheet
PEXLNKCAP[7:2,0] - PCI Express Link Capabilities Register
The Link Capabilities register identifies the PCI Express specific link capabilities.
Device:
Function:
Offset:
Version:
Device:
Function:
Offset:
Version:
Device:
Function:
Offset:
Version:
Bit
3
2
1
0
RWC
RWC
RWC
RWC
Attr
0, 2-3
0
76h
Intel 5000P Chipset, Intel 5000V Chipset, Intel 5000Z Chipset
4-5
0
76h
Intel 5000Z Chipset
4-7
0
76h
Intel 5000P Chipset
Default
0
0
0
0
URD: Unsupported Request Detected
This bit indicates that the device received an Unsupported Request
Express port
reporting is enabled or not in the Device Control Register.
1: Unsupported Request detected at the port
This records the detection of receiving an unsupported request, error IO2.
FED: Fatal Error Detected
This bit indicates that status of a
Express port. Errors are logged in this register regardless of whether error
reporting is enabled or not in the Device Control register.
1: Fatal errors detected
0: No Fatal errors detected
NFED: Non Fatal Error Detected
This bit indicates status of non-fatal errors detected. This bit gets set if a non-
fatal uncorrectable error is detected in the PCI Express port. Errors are logged
in this register regardless of whether error reporting is enabled or not in the
Device Control register.
1: Non Fatal errors detected
0: No non-Fatal Errors detected
CED: Correctable Error Detected
This bit indicates status of correctable errors detected. This bit gets set if a
correctable error is detected in the PCI Express port. Errors are logged in this
register regardless of whether error reporting is enabled or not in the
Express Device Control register.
1: Correctable errors detected
0: No correctable errors detected
. Errors are logged in this register regardless of whether error
fatal (uncorrectable) error detected
Description
in the PCI
in the PCI
PCI
145
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