LH79520N0M000B1 NXP Semiconductors, LH79520N0M000B1 Datasheet - Page 25

• Manufacturer Part Number: LH79520N0M000B1
• Manufacturer: NXP Semiconductors

Specifications of LH79520N0M000B1

• Operating Temperature (min): -40C
• Operating Temperature (max): 85C
• Processing Unit: Microcontroller
• Operating Supply Voltage (min): 1.62V
• Operating Supply Voltage (typ): 1.8V
• Operating Supply Voltage (max): 1.98V
• Package Type: LQFP
• Screening Level: Industrial
• Pin Count: 176
• Mounting: Surface Mount
• Rad Hardened: No
• Lead Free Status / RoHS Status: Not Compliant

System-on-Chip
Preliminary data sheet
D[31:0]
nCS6 - nCS0 Output 30 pF
nBLE[3:0]
nWE
nOE
nWAIT
A[25:0]
D[31:0]
nCAS
nRAS
nSDWE
SDCKE
DQM[3:0]
nSDCS[1:0]
SDCLK
SIGNAL
Output 50 pF
Output 30 pF
Output 30 pF
Output 30 pF
Output 50 pF
Output 50 pF
Output 50 pF
Output 30 pF
Output 30 pF
Output 30 pF
Output 30 pF
Output 30 pF
Ouput 50 pF
TYPE LOAD DRIVE
Input
Input
Input
8 mA
8 mA
8 mA
8 mA
8 mA
8 mA
8 mA
8 mA
8 mA
8 mA
8 mA
8 mA
8 mA
8 mA
Table 8. AC Signal Characteristics (Commercial)
ASYNCHRONOUS MEMORY INTERFACE SIGNALS
SYNCHRONOUS MEMORY INTERFACE SIGNALS
SYMBOL
tOHSDW
tOHBEW
tOVSDW
tOHBER
tISWAIT
tSDCLK
tOVWE
tOHWE
tOHDQ
tOHCS
tOVOE
tOHOE
tOHCA
tOHRA
tOVDQ
tOHSC
tOVCS
tOVBE
tOVCA
tOVRA
tOVC0
tOHC0
tOVSC
tOHD
tOHD
tOVD
tOVA
tOVD
tIDD
tISD
tIDD
Rev. 01 — 16 July 2007
NXP Semiconductors
3 × tHCLK - 6 ns
3 × tHCLK - 6 ns
2 × tHCLK - 6 ns
3 × tHCLK - 6 ns
2 × tHCLK - 6 ns
3 × tHCLK - 6 ns
19.37 ns
1.2 ns
1.5 ns
MIN.
5 ns
2 ns
2 ns
2 ns
2 ns
2 ns
2 ns
2 × tHCLK – 18 ns
2 × tHCLK – 18 ns
2 × tHCLK - 6 ns
2 × tHCLK – 18 ns
tHCLK + 10 ns
tHCLK + 10 ns
tHCLK + 10 ns
tHCLK + 6 ns
tHCLK + 6 ns
+ (nWAIT –1)
× tHCLK
10.5 ns
10.5 ns
10.5 ns
10.5 ns
10.5 ns
10.5 ns
10.5 ns
MAX.
11 ns
Data Output Valid, following
Address Valid
Data Output Invalid, following
Address Valid
Data Input Valid, following
Address Valid
Data Input Valid, following
Address Valid (nWAIT states)
Chip Select Output Valid,
following Address Valid
Chip Select Output Invalid,
following Address Valid
Byte Lane Enable Valid,
following Address Valid
Byte Lane Enable Invalid, follow-
ing Address Valid; Write Cycle
Byte Lane Enable Invalid, follow-
ing Address Valid; Read Cycle
Write Enable Valid, following
Address Valid
Write Enable Invalid, following
Address Valid
Ouput Enable Valid, following
Address Valid
Ouput Enable Invalid, following
Address Valid
WAIT Input Valid, following
Address Valid
Address Valid
Output Data Valid
Output Data Hold
Input Data Setup
Input Data Hold
CAS Valid
CAS Hold
RAS Valid
RAS Hold
SDWE Write Enable Valid
SDWE Write Enable Hold
SDCKE Clock Enable Valid
SDCKE Clock Enable Hold
DQM Data Mask Valid
DQM Data Mask Hold
SDCS Data Mask Valid
SDCS Data Mask Hold
SDRAM Clock Period
DESCRIPTION
LH79520
25